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TC811CPL 数据表(PDF) 5 Page - TelCom Semiconductor, Inc |
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TC811CPL 数据表(HTML) 5 Page - TelCom Semiconductor, Inc |
5 / 12 page 3-141 TELCOM SEMICONDUCTOR, INC. 7 6 5 4 3 1 2 8 3-1/2 DIGIT A/D CONVERTER WITH HOLD AND DIFFERENTIAL REFERENCE INPUTS TC811 where: VREF = Reference voltage tINT = Integration Time tDEINT = Deintegration Time GENERAL THEORY OF OPERATION Dual-Slope Conversion Principles (All Pin Designations Refer to 40-Pin DIP Package) The TC811 is a dual slope, integrating analog-to-digital converter. An understanding of the dual slope conversion technique will aid the user in following the detailed TC811 theory of operation following this section. A conventional dual slope converter measurement cycle has two distinct phases: 1) Input Signal Integration 2) Reference Voltage Integration (Deintegration) Referring to Figure 2, the unknown input signal to be converted is integrated from zero for a fixed time period (TINT), measured by counting clock pulses. A constant reference voltage of the opposite polarity is then integrated until the integrator output voltage returns to zero. The reference integration (deintegration) time (TDEINT) is then directly proportional to the unknown input voltage (VIN). In a simple dual slope converter, a complete conversion requires the integrator output to “ramp-up” from zero and “ramp-down” back to zero. A simple mathematical equation relates the input signal, reference voltage and integration time: 30 20 10 0 0.1/T 1/T 10/T INPUT FREQUENCY T = MEASUREMENT PERIOD Figure 2. Basic Dual Slope Converter REF VOLTAGE ANALOG INPUT SIGNAL +/– DISPLAY SWITCH DRIVER CONTROL LOGIC CLOCK COUNTER POLARITY CONTROL PHASE CONTROL VIN VIN VFULL SCALE 1.2 VFULL SCALE VARIABLE REFERENCE INTEGRATE TIME FIXED SIGNAL INTEGRATE TIME INTEGRATOR C COMPARATOR ≈ ≈ VREF + TC811 33 35 240k Ω 10k Ω 31 29 39 40 VREF – 0.47 µF 0.1µF V – 1 OSC 2 OSC TO ANALOG COMMON (PIN 32) 2 CONVERSION/SEC 180k Ω 0.068µF 0.01µF ANALOG INPUT + – C REF 34 C REF + VIN + VIN – ANALOG COMMON VINT VBUFF CAZ 20 21 38 SEGMENT DRIVE 9–19 22–25 POL BP V + MINUS SIGN BACKPLANE 28 LCD 1M Ω 27 30 32 33 36 9V + 26 20pF 10pF V + V + 22M Ω 470k 1 HLDR 0 tINT ∫ 1 VREF tDEINT RINT CINT RINT CINT VIN(t) dt = [ ] For a constant VINT: VIN = VREF tDEINT tINT Figure 3. Normal-Mode Rejection of Dual Slope Converter Figure 1. Typical Operating Circuit |
类似零件编号 - TC811CPL |
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类似说明 - TC811CPL |
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