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TC4469CPD 数据表(PDF) 3 Page - TelCom Semiconductor, Inc |
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TC4469CPD 数据表(HTML) 3 Page - TelCom Semiconductor, Inc |
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3 / 9 page  4-263 TELCOM SEMICONDUCTOR, INC. 7 6 5 4 3 1 2 8 LOGIC-INPUT CMOS QUAD DRIVERS TC4467 TC4468 TC4469 Symbol Parameter Test Conditions Min Typ Max Unit Input VIH Logic 1, High Input Voltage (Note 3) 2.4 — — V VIL Logic 0, Low Input Voltage (Note 3) — — 0.8 V IIN Input Current 0V ≤ VIN ≤ VDD – 10 — 10 µA Output VOH High Output Voltage ILOAD = 100 µA (Note 1) VDD – 0.025 — — V VOL Low Output Voltage ILOAD = 10 mA (Note 1) — — 0.30 V RO Output Resistance IOUT = 10 mA, VDD = 18V — 20 30 Ω IPK Peak Output Current — 1.2 — A I Latch-Up Protection 4.5V ≤ VDD ≤ 16V 500 — — mA Withstand Reverse Current Switching Time tR Rise Time Figure 1 — — 50 nsec tF Fall Time Figure 1 — — 50 nsec tD1 Delay Time Figure 1 — — 100 nsec tD2 Delay Time Figure 1 — — 100 nsec Power Supply IS Power Supply Current — — 8 mA IS Power Supply Voltage Note 2 4.5 — 18 V ELECTRICAL CHARACTERISTICS: Measured throughout operating temperature range with 4.5V ≤ VDD≤ 18V, unless otherwise specified. NOTES: 1. Totem-pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. 2. When driving all four outputs simultaneously in the same direction, VDD shall be limited to 16V. This reduces the chance that internal dv/dt will cause high-power dissipation in the device. 3. The input threshold has about 50 mV of hysteresis centered at approximately 1.5V. Slow moving inputs will force the device to dissipate high peak currents as the input transitions through this band. Input rise times should be kept below 5 µs to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum or below the minimum input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device. PIN CONFIGURATIONS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1A 1B 2A 2B 3A 3B GND V 1Y 2Y 3Y 4Y 4B 4A DD 1 2 3 4 5 6 7 8 16 13 12 11 10 9 1A 1B 2A 2B 3A 3B GND GND V 1Y 2Y 3Y 4Y 4B 4A DD VDD 15 14 TC4467/8/9 TC4467/8/9 16-Pin SOIC (Wide) 14-Pin Plastic DIP/CerDIP |
类似零件编号 - TC4469CPD |
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类似说明 - TC4469CPD |
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