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CS5340 数据表(PDF) 10 Page - Cirrus Logic |
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CS5340 数据表(HTML) 10 Page - Cirrus Logic |
10 / 22 page 10 DS601F2 CS5340 Confidential Draft 3/11/08 DC ELECTRICAL CHARACTERISTICS (GND = 0 V, all voltages with respect to 0 V. MCLK=12.288 MHz; Master Mode) 9. Power Down Mode is defined as RST = Low, with all clocks and data lines held static at a valid logic levels. 10. Valid with the recommended capacitor values on FILT+ and VQ as shown in the Typical Connection Diagram, Figure 17 on page 14. DIGITAL CHARACTERISTICS Parameter Symbol Min Typ Max Unit DC Power Supplies: Positive Analog Positive Digital Positive Logic VA VD VL 3.1 3.1 1.7 - - - 5.25 5.25 5.25 V V V Power Supply Current VA = 5 V (Normal Operation) VA = 3.3 V VL,VD = 5 V VL,VD = 3.3 V IA IA ID ID - - - - 21 18.2 15 9 25.5 22.5 18.5 10 mA mA mA mA Power Supply Current VA = 5 V (Power-Down Mode) (Note 9) VL,VD=5 V IA ID - - 1.5 0.4 - - mA mA Power Consumption VL, VD, VA = 5 V (Normal Operation) VL, VD, VA = 3.3 V (Power-Down Mode) - - - - - - 180 90 9.5 220 107.2 - mW mW mW Power Supply Rejection Ratio (1 kHz) (Note 10) PSRR - 65 - dB VQ Nominal Voltage Output Impedance - - VA ÷2 25 - - V k Ω Filt+ Nominal Voltage Output Impedance Maximum allowable DC current source/sink - - - VA 36 0.01 - - - V k Ω mA Parameter Symbol Min Typ Max Units High-Level Input Voltage (% of VL) VIH 70% - - V Low-Level Input Voltage (% of VL) VIL -- 30% V High-Level Output Voltage at Io = 100 µA(% of VL) VOH 70% - - V Low-Level Output Voltage at Io =100 µA(% of VL) VOL -- 15% V Input Leakage Current Iin -10 - +10 µA |
类似零件编号 - CS5340_08 |
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类似说明 - CS5340_08 |
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