Preliminary Technical Data

AD7280

Rev. PrD | Page 7 of 33

20

DGND

Digital Ground. Ground reference point for all digital circuitry on the AD7280. The DGND and AGND voltages

should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis.

21

CS

input is used to frame the input and output data on the SPI. The CS input also frames the input and output data

22

SCLK

Serial Clock Input. When acting as master the SCLK input is supplied from the DSP/uP. When acting as a slave on

the Daisy Chain this input should be connected to the SCLKhi output of the AD7280 immediately below it in

potential in the Daisy Chain.

23

SDI

Serial Data Input. Data to be written to the on-chip registers is provided on this input and is clocked into the

AD7280 on the falling edge of SCLK. When acting as master this is the data input of the SPI interface. When

acting as a slave on the Daisy Chain this input acepts data from the SDOhi output of the AD7280 immediately

below it in potential in the Daisy Chain.

24

CNVST

Convert Start Input. The conversion is initiated on the falling edge of CONVST. When acting as master the

CNVST pulse is supplied from the DSP/uP. When acting as a slave on the Daisy Chain this input should be

connected to the CNVSThi output of the AD7280 immediately below it in potential in the Daisy Chain. This

25

SDOlo

Serial Data Output in Daisy Chain mode. This output should be connected to the SDIhi input of the AD7280

immediately below it in potential on the Daisy Chain. The data from each AD7280 in the Daisy Chain will be

passed through the SDOlo outputs and SDIhi inputs of each AD7280 in the chain and supplied to the uP/DSP

through the SDO output of the master AD7280.

26

SDO

Serial Data Output. The conversion output data or the register output data is supplied to this pin as a serial data

stream. The bits are clocked out on the falling edge of the SCLK input, and 24 SCLKs are required to access the

data. The data is provided MSB first. In a Daisy Chain application the SDO output of the master AD7280 should

be connected to the uP/DSP. The SDO outputs of the remaining AD7280s in the chain should be terminated to

Ω resistor. The data from each AD7280 in the Daisy Chain will be passed through the SDOlo

outputs and SDIhi inputs of each AD7280 in the chain and supplied to the uP/DSP through the SDO output of

the master AD7280. 24 SCLKs are required for each AD7280 in the chain to access the data.

27

ALERT

Digital Output. Flag to indicate over voltage, under voltage, over temperature or under temperature. The ALERT

output of the master AD7280 should be connected to the uP/DSP. The ALERT outputs of the remaining

Ω resistor..

28

ALERTlo

Alert Output in Daisy Chain mode. The alert signal from each AD7280 in the Daisy Chain will be passed through

the ALERTlo outputs and ALERThi inputs of each AD7280 in the chain and supplied to the uP/DSP through the

ALERT output of the master AD7280. This input should be connected to the ALERThi input of the AD7280

immediately below it in potential on the Daisy Chain.

29

Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface operates.

This pin should be decoupled to DGND. The voltage range on this pin is 2.7 V to 5.25 V and may be different to

30

be shorted together, to ensure that the voltage difference between them never exceeds 0.3 V even on a

31

AGND

Analog Ground. Ground reference point for all analog circuitry on the AD7280. This input should be at the

same potential as the base of the series connected battery cells. The AGND and DGND voltages ideally should

be at the same potential and must not be more than 0.3 V apart, even on a transient basis.

32

Thermistor termination resistor input.

33 to 38

VT6 to VT1

Voltage temperature input from potential divider with thermistor.

39

A 100 nF decoupling capacitor to REFGND should be placed on this pin.

40

Reference Output. The on-chip reference is availble on this pin for use external to the AD7280. The nominal

internal reference voltage is 2.5V, which appears at the pin. A 10

µF decoupling capacitor to REFGND is

recommended on this pin.

41

REFGND

Reference Ground. This is the ground reference point for the internal bandgap reference circuitry on the

AD7280. The REFGND voltage should be at the same potential as the AGND voltage.

42

ALERThi

Alert Input in Daisy Chain mode. Flag to indicate over voltage, under voltage, over temperature or under

temperature in Daisy Chain mode. The alert signal from each AD7280 in the Daisy Chain will be passed through

the ALERTlo outputs and ALERThi inputs of each AD7280 in the chain and supplied to the uP/DSP through the

ALERT output of the master AD7280. This input should be connected to the ALERTlo output of the AD7280

immediately above it in potential on the Daisy Chain.