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TMP102AIDRLT 数据表(PDF) 5 Page - Texas Instruments |
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TMP102AIDRLT 数据表(HTML) 5 Page - Texas Instruments |
5 / 19 page APPLICATION INFORMATION POINTER REGISTER TMP102 0.01mF V+ GND 2 5 3 ALERT (Output) 4 ADD0 1 SCL 6 SDA To Two-Wire Controller NOTE:SCL,SDA,andALERT pinsrequirepull-upresistors. I/O Control Interface SCL SDA Temperature Register Configuration Register T LOW Register T HIGH Register Pointer Register TMP102 www.ti.com ............................................................................................................................................... SBOS397B – AUGUST 2007 – REVISED OCTOBER 2008 The TMP102 is a digital temperature sensor that is optimal for thermal-management and thermal- Figure 8 shows the internal register structure of the protection applications. The TMP102 is two-wire- and TMP102. The 8-bit Pointer Register of the device is SMBus interface-compatible, and is specified over a used to address a given data register. The Pointer temperature range of –40°C to +125°C. Register uses the two LSBs (see Table 11) to identify which of the data registers should respond to a read Pull-up resistors are required on SCL, SDA, and or write command. Table 1 identifies the bits of the ALERT. A 0.01 µF bypass capacitor is recommended, Pointer Register byte. During a write command, P2 as shown in Figure 7. through P7 must always be '0'. Table 2 describes the pointer address of the registers available in the TMP102. Power-up reset value of P1/P0 is '00'. By default, the TMP102 reads the temperature on power-up. Figure 7. Typical Connections The temperature sensor in the TMP102 is the chip itself. Thermal paths run through the package leads, as well as the plastic package. The lower thermal resistance of metal causes the leads to provide the primary thermal path. To maintain accuracy in applications requiring air or Figure 8. Internal Register Structure surface temperature measurement, care should be taken to isolate the package and leads from ambient air temperature. A thermally-conductive adhesive is Table 1. Pointer Register Byte helpful in achieving accurate surface temperature P7 P6 P5 P4 P3 P2 P1 P0 measurement. 0 0 0 0 0 0 Register Bits Table 2. Pointer Addresses P1 P0 REGISTER 0 0 Temperature Register (Read Only) 0 1 Configuration Register (Read/Write) 1 0 TLOW Register (Read/Write) 1 1 THIGH Register (Read/Write) Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): TMP102 |
类似零件编号 - TMP102AIDRLT |
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类似说明 - TMP102AIDRLT |
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