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LFSC3GA80KLUTSEP1FF1020C 数据表(PDF) 9 Page - Lattice Semiconductor |
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LFSC3GA80KLUTSEP1FF1020C 数据表(HTML) 9 Page - Lattice Semiconductor |
9 / 237 page 2-5 Architecture Lattice Semiconductor LatticeSC/M Family Data Sheet Modes of Operation Each Slice is capable of four modes of operation: Logic, Ripple, RAM and ROM. Table 2-2 lists the modes and the capability of the Slice blocks. Table 2-2. Slice Modes Logic Mode In this mode, the LUTs in each Slice are configured as combinatorial lookup tables. A LUT4 can have 16 possible input combinations. Any logic function with four inputs can be generated by programming this lookup table. Since there are two LUT4s per Slice, a LUT5 can be constructed within one Slice. Larger lookup tables such as LUT6, LUT7 and LUT8 can be constructed by concatenating other Slices in the PFU. Ripple Mode Ripple mode allows the efficient implementation of small arithmetic functions. In ripple mode, the following func- tions can be implemented by each Slice: • Addition 2-bit • Subtraction 2-bit • Up counter 2-bit • Down counter 2-bit • Comparator functions of A and B inputs - A greater-than-or-equal-to B - A not-equal-to B - A less-than-or-equal-to B Ripple Mode includes an optional configuration that performs arithmetic using fast carry chain methods. In this con- figuration (also referred to as CCU2 mode) two additional signals, Carry Generate and Carry Propagate, are gener- ated on a per slice basis to allow fast arithmetic functions to be constructed by concatenating Slices. RAM Mode In this mode, distributed RAM can be constructed using each LUT block as a 16x1-bit memory. Through the combi- nation of LUTs and Slices, a variety of different memories can be constructed. The Lattice design tools support the creation of a variety of different size memories. Where appropriate, the soft- ware will construct these using distributed memory primitives that represent the capabilities of the Slice. Table 2-3 shows the number of Slices required to implement different distributed RAM primitives. Dual port memories involve the pairing of two Slices, one Slice functions as the read-write port. The other companion Slice supports the read- only port. For more information on RAM mode, please see details of additional technical documentation at the end of this data sheet. Table 2-3. Number of Slices Required For Implementing Distributed RAM ROM Mode The ROM mode uses the same principal as the RAM modes, but without the Write port. Pre-loading is accom- plished through the programming interface during configuration. Logic Ripple RAM ROM PFU Slice LUT 4x2 or LUT 5x1 2-bit Arithmetic Unit SPR 16x2 DPR 16x2 ROM 16x2 SPR16x2 DPR16x2 Number of Slices 1 2 Note: SPR = Single Port RAM, DPR = Dual Port RAM |
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