数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD7264BCPZ 数据表(PDF) 3 Page - Analog Devices

部件名 AD7264BCPZ
功能描述  1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators
Download  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7264BCPZ 数据表(HTML) 3 Page - Analog Devices

  AD7264BCPZ Datasheet HTML 1Page - Analog Devices AD7264BCPZ Datasheet HTML 2Page - Analog Devices AD7264BCPZ Datasheet HTML 3Page - Analog Devices AD7264BCPZ Datasheet HTML 4Page - Analog Devices AD7264BCPZ Datasheet HTML 5Page - Analog Devices AD7264BCPZ Datasheet HTML 6Page - Analog Devices AD7264BCPZ Datasheet HTML 7Page - Analog Devices AD7264BCPZ Datasheet HTML 8Page - Analog Devices AD7264BCPZ Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 3 / 32 page
background image
AD7264
Rev. A | Page 3 of 32
SPECIFICATIONS
AVCC = 4.75 V to 5.25 V, CA_CBVCC = CC_CDVCC = 2.7 V to 5.25 V, VDRIVE = 2.7 V to 5.25 V, fS = 1 MSPS and fSCLK = 34 MHz for
the AD7264, fS = 500 kSPS and fSCLK = 20 MHz for the AD7264-5, VREF = 2.5 V internal/external; TA = −40°C to +105°C, unless otherwise
noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DYNAMIC PERFORMANCE1
fIN = 100 kHz sine wave
Signal-to-Noise Ratio (SNR)2
76
78
dB
PGA gain setting = 2
Signal-to-(Noise + Distortion) Ratio
(SINAD)2
74
77
dB
Total Harmonic Distortion (THD)2
−85
−77
dB
Spurious-Free Dynamic Range (SFDR)
−97
dB
Common-Mode Rejection Ratio (CMRR)
−76
dB
For PGA gain setting = 2, ripple
frequency of 50 Hz/60 Hz; see
Figure 17 and Figure 18
ADC-to-ADC Isolation2
−90
dB
Bandwidth3
1.2
MHz
@ −3 dB; PGA gain setting = 128
1.7
MHz
@ −3 dB; PGA gain setting = 2
DC ACCURACY
Resolution
14
Bits
Integral Nonlinearity2
±1.5
±3
LSB
Differential Nonlinearity2
±0.5
±0.99
LSB
Guaranteed no missed codes to 14 bits
Positive Full-Scale Error2
±0.122
±0.305
% FSR
Precalibration
±0.018
% FSR
Postcalibration
Positive Full-Scale Error Match2
±0.061
% FSR
Zero Code Error2
±0.092
±0.244
% FSR
Precalibration
±0.012
% FSR
Postcalibration
Zero Code Error Match2
±0.061
% FSR
Negative Full-Scale Error2
±0.122
±0.305
% FSR
Precalibration
±0.018
% FSR
Postcalibration
Negative Full-Scale Error Match2
±0.061
% FSR
Zero Code Error Drift
2.5
μV/°C
ANALOG INPUT
Input Voltage Range, VIN+ and VIN
Gain
2
V
V
REF
CM
×
±
V
VCM = AVCC/2; PGA gain setting ≥ 2
Common-Mode Voltage Range, VCM
VCM − 100 mV
VCM + 100 mV
V
VCM = 2 V; PGA gain setting = 1;
see Figure 194
(VCC/2) − 0.4
(VCC/2) + 0.2
V
VCM = AVCC/2; PGA gain setting = 2
(VCC/2) − 0.4
(VCC/2) + 0.4
V
VCM = AVCC/2; 3 ≤ PGA gain setting ≤ 32
(VCC/2) − 0.6
(VCC/2) + 0.8
V
VCM = AVCC/2; PGA gain setting ≥ 48
DC Leakage Current
±0.001
±1
μA
Input Capacitance3
5
pF
Input Impedance3
1
REFERENCE INPUT/OUTPUT
Reference Output Voltage5
2.495
2.5
2.505
V
2.5 V ± 5 mV max @ 25°C
Reference Input Voltage
2.5
V
DC Leakage Current
±0.3
±1
μA
External reference applied to
Pin VREFA/Pin VREFB
Input Capacitance3
20
pF
VREFA, VREFB Output Impedance3
4
Ω
Reference Temperature Coefficient
20
ppm/°C
VREF Noise3
20
μV rms


类似零件编号 - AD7264BCPZ

制造商部件名数据表功能描述
logo
Analog Devices
AD7264BCPZ AD-AD7264BCPZ Datasheet
1Mb / 30P
   1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC
AD7264BCPZ-5 AD-AD7264BCPZ-5 Datasheet
1Mb / 30P
   1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC
AD7264BCPZ-5-RL7 AD-AD7264BCPZ-5-RL7 Datasheet
1Mb / 30P
   1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC
AD7264BCPZ-RL7 AD-AD7264BCPZ-RL7 Datasheet
1Mb / 30P
   1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC
More results

类似说明 - AD7264BCPZ

制造商部件名数据表功能描述
logo
Analog Devices
AD7262 AD-AD7262 Datasheet
920Kb / 32P
   1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators
REV. 0
AD7264 AD-AD7264_17 Datasheet
1Mb / 30P
   1 MSPS, 14-Bit, Simultaneous Sampling SAR ADC
AD7262 AD-AD7262_17 Datasheet
881Kb / 33P
   1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC
AD7357 AD-AD7357 Datasheet
196Kb / 17P
   Differential Input,Dual,Simultaneous Sampling, 4.25 MSPS, 14-Bit, SAR ADC
Rev. PrD
AD7357 AD-AD7357_09 Datasheet
469Kb / 20P
   Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
REV. 0
AD7357 AD-AD7357_15 Datasheet
623Kb / 21P
   Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
REV. B
AD7357 AD-AD7357_08 Datasheet
398Kb / 20P
   Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC
Rev. PrF
AD7865ASZ-1 AD-AD7865ASZ-1 Datasheet
211Kb / 19P
   Four-Channel, Simultaneous Sampling, Fast, 14-Bit ADC
REV. B
AD7865ASZ-2 AD-AD7865ASZ-2 Datasheet
211Kb / 19P
   Four-Channel, Simultaneous Sampling, Fast, 14-Bit ADC
REV. B
AD7865ASZ-3 AD-AD7865ASZ-3 Datasheet
197Kb / 19P
   Four-Channel, Simultaneous Sampling, Fast, 14-Bit ADC
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com