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ST72F260G1B6 数据表(PDF) 5 Page - STMicroelectronics |
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ST72F260G1B6 数据表(HTML) 5 Page - STMicroelectronics |
5 / 171 page ST72260G, ST72262G, ST72264G 5/171 1 INTRODUCTION The ST72260G, ST72262G and ST72264G devic- es are members of the ST7 microcontroller family. They can be grouped as follows : – ST72264G devices are designed for mid-range applications with ADC, I2C and SCI interface ca- pabilities. – ST72262G devices target the same range of ap- plications but without I2C interface or SCI. – ST72260G devices are for applications that do not need ADC, I2C peripherals or SCI. All devices are based on a common industry- standard 8-bit core, featuring an enhanced instruc- tion set. The ST72F260G, ST72F262G, and ST72F264G versions feature single-voltage FLASH memory with byte-by-byte In-Circuit Programming (ICP) capabilities. Under software control, all devices can be placed in WAIT, SLOW, Active-HALT or HALT mode, re- ducing power consumption when the application is in idle or stand-by state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. For easy reference, all parametric data is located in Section 13 on page 122. Figure 1. General Block Diagram 8-BIT CORE ALU OSC1 OSC2 RESET PORT B 16-BIT TIMER A PORT A SPI PORT C 10-BIT ADC* PB7:0 (8 bits) PC5:0 (6 bits) MULTI OSC Internal CLOCK CONTROL RAM (256 Bytes) PA7:0 (8 bits) VSS VDD POWER SUPPLY 16-BIT TIMER B PROGRAM (4 or 8K Bytes) LVD + CLOCK FILTER SCI* MEMORY ICD WATCHDOG I2C* *Not available on some devices, see device summary on page 1. MCC/RTC |
类似零件编号 - ST72F260G1B6 |
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类似说明 - ST72F260G1B6 |
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