The SN54F299 is obsolete and no

longer supplied.

SN54F299, SN74F299

8BIT UNIVERSAL SHIFT/STORAGE REGISTERS

WITH 3STATE OUTPUTS

SDFS071B − MARCH 1987 − REVISED APRIL 2004

4

POST OFFICE BOX 655303

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN54F299

SN74F299

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

MIN

TYP†

MAX

UNIT

VIK

VCC = 4.5 V,

II = − 18 mA

− 1.2

− 1.2

V

QA′ or QH′

IOH = − 1 mA

2.5

3.4

2.5

3.4

VOH

QA thru QH

VCC = 4.5 V

IOH = − 1 mA

2.5

3.4

2.5

3.4

V

VOH

QA thru QH

VCC = 4.5 V

IOH = − 3 mA

2.4

3.3

2.4

3.3

V

Any output

VCC = 4.75 V,

IOH = − 1 mA to − 3 mA

2.7

QA′ or QH′

IOL = 20 mA

0.3

0.5

0.3

0.5

VOL

QA thru QH

VCC = 4.5 V

IOL = 20 mA

0.3

0.5

V

VOL

QA thru QH

VCC = 4.5 V

IOL = 24 mA

0.35

0.5

V

II

A thru H

VCC = 5.5 V

VI = 5.5 V

1

1

mA

II

Any other

VCC = 5.5 V

VI = 7 V

0.1

0.1

mA

IIH‡

A thru H

VCC = 5.5 V,

VI = 2.7 V

70

70

A

IIH‡

Any other

VCC = 5.5 V,

VI = 2.7 V

20

20

µA

A thru H

− 0.65

− 0.65

IIL‡

S0 or S1

VCC = 5.5 V,

VI = 0.5 V

− 1.2

− 1.2

mA

IIL‡

Any other

VCC = 5.5 V,

VI = 0.5 V

− 0.6

− 0.6

mA

IOS§

VCC = 5.5 V,

VO = 0

−60

−150

−60

−150

mA

ICC

VCC = 5.5 V,

See Note 4

68

95

68

95

mA

† All typical values are at VCC = 5 V, TA = 25°C.

‡ For I/O ports (QA thru QH), the parameters IIH and IIL include the off-state output current.

§ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

NOTE 4: ICC is measured with OE1, OE2, and CLK at 4.5 V.

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted)

VCC = 5 V,

TA = 25°C

SN54F299

SN74F299

UNIT

′F299

SN54F299

SN74F299

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

70

65

70

MHz

tw

Pulse duration

CLK high or low

7

8

7

ns

tw

Pulse duration

CLR low

7

8

7

ns

Setup time before

S0 or S1

High or low

8.5

9.5

8.5

tsu

Setup time before

CLK

↑

A/QA thru H/QH, SR, or SL

High or low

5.5

6.5

5.5

ns

tsu

Inactive-state setup

time before CLK

↑¶

CLR

High

7

13

7

ns

th

Hold time after CLK

↑

S0 or S1

High or low

0

0

0

ns

th

Hold time after CLK

↑

A/QA thru H /QH, SR, or SL High or low

2

2

2

ns

¶ Inactive-state setup time also is referred to as recovery time.