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74ABT18245ADGGRG4 数据表(PDF) 9 Page - Texas Instruments |
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74ABT18245ADGGRG4 数据表(HTML) 9 Page - Texas Instruments |
9 / 34 page SN54ABT18245A, SN74ABT18245A SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS SCBS110H – AUGUST 1992 – REVISED FEBRUARY 1999 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 data register description boundary-scan register The boundary-scan register (BSR) is 44 bits long. It contains one boundary-scan cell (BSC) for each normal-function input pin, one BSC for each normal-function I/O pin (one single cell for both input data and output data), and one BSC for each of the internally decoded output-enable signals (1OEA, 2OEA, 1OEB, 2OEB). The BSR is used to store test data that is to be applied externally to the device output pins, and/or to capture data that appears internally at the outputs of the normal on-chip logic and/or externally at the device input pins. The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The contents of the BSR can change during Run-Test/Idle, as determined by the current instruction. At power up or in Test-Logic-Reset, BSCs 43–40 are reset to logic 0, ensuring that these cells, which control A-port and B-port outputs, are set to benign values (i.e., if test mode were invoked, the outputs would be at the high-impedance state). Reset values of other BSCs should be considered indeterminate. When external data is to be captured, the BSCs for signals 1OEA, 2OEA, 1OEB, and 2OEB capture logic values determined by the following positive-logic equations: 1OEA = 1OE • 1DIR, 2OEA = 2OE • 2DIR, 1OEB = 1OE • DIR, and 2OEB = 2OE • DIR. When data is to be applied externally, these BSCs control the drive state (active or high impedance) of their respective outputs. The BSR order of scan is from TDI through bits 43–0 to TDO. Table 1 shows the BSR bits and their associated device pin signals. Table 1. Boundary-Scan Register Configuration BSR BIT NUMBER DEVICE SIGNAL BSR BIT NUMBER DEVICE SIGNAL BSR BIT NUMBER DEVICE SIGNAL BSR BIT NUMBER DEVICE SIGNAL BSR BIT NUMBER DEVICE SIGNAL 43 2OEB 35 2A9-I/O 26 1A9-I/O 17 2B9-I/O 8 1B9-I/O 42 1OEB 34 2A8-I/O 25 1A8-I/O 16 2B8-I/O 7 1B8-I/O 41 2OEA 33 2A7-I/O 24 1A7-I/O 15 2B7-I/O 6 1B7-I/O 40 1OEA 32 2A6-I/O 23 1A6-I/O 14 2B6-I/O 5 1B6-I/O 39 2DIR 31 2A5-I/O 22 1A5-I/O 13 2B5-I/O 4 1B5-I/O 38 1DIR 30 2A4-I/O 21 1A4-I/O 12 2B4-I/O 3 1B4-I/O 37 2OE 29 2A3-I/O 20 1A3-I/O 11 2B3-I/O 2 1B3-I/O 36 1OE 28 2A2-I/O 19 1A2-I/O 10 2B2-I/O 1 1B2-I/O 27 2A1-I/O 18 1A1-I/O 9 2B1-I/O 0 1B1-I/O boundary-control register The boundary-control register (BCR) is three bits long. The BCR is used in the context of the boundary-run test (RUNT) instruction to implement additional test operations not included in the basic SCOPE ™ instruction set. Such operations include PRPG, PSA, and binary count up (COUNT). Table 4 shows the test operations that are decoded by the BCR. During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is reset to the binary value 010, which selects the PSA test operation. The BCR order of scan is shown in Figure 3. Bit 0 (LSB) TDO TDI Bit 1 Bit 2 (MSB) Figure 3. Boundary-Control Register Order of Scan |
类似零件编号 - 74ABT18245ADGGRG4 |
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类似说明 - 74ABT18245ADGGRG4 |
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