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ST7LITE3XF2 数据表(PDF) 5 Page - STMicroelectronics |
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ST7LITE3XF2 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 173 page  ST7LITE3xF2 5/173 1 INTRODUCTION The ST7LITE3 is a member of the ST7 microcon- troller family. All ST7 devices are based on a com- mon industry-standard 8-bit core, featuring an en- hanced instruction set. The ST7LITE3 features FLASH memory with byte-by-byte In-Circuit Programming (ICP) and In- Application Programming (IAP) capability. Under software control, the ST7LITE3 device can be placed in WAIT, SLOW, or HALT mode, reduc- ing power consumption when the application is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. For easy reference, all parametric data are located in section 13 on page 131. The devices feature an on-chip Debug Module (DM) to support in-circuit debugging (ICD). For a description of the DM registers, refer to the ST7 ICC Protocol Reference Manual. Figure 1. General Block Diagram 8-BIT CORE ALU RESET PORT A CONTROL RAM (384 Bytes) PA7:0 (8 bits) VSS VDD POWER SUPPLY PROGRAM (8K Bytes) LVD MEMORY 8-Bit LITE TIMER 2 PORT B SPI PB6:0 (7 bits) WDG ADC 12-Bit Auto-Reload TIMER 2 LINSCI Debug Module OSC1 OSC2 Internal CLOCK PLL x 8 Ext. 1MHz Int. 1MHz 1% RC OSC to 16MHz CLKIN / 2 or PLL X4 DATA EEPROM ( 256 Bytes) 1 |
类似零件编号 - ST7LITE3XF2 |
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类似说明 - ST7LITE3XF2 |
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