INPUT AND OUTPUT EQUIVALENT CIRCUIT

TRUTH TABLE

INPUTS

INTERNAL OUTPUTS

OUTPUS

OUTPUS

SHIFT/

LOAD

CLOCK

INHIBIT

CLOCK

SERIAL IN

A .........H

QA

QB

QH

QH

L

X

X

X

a............h

a

b

h

h

H

L

H

X

H

QAn

QGn

QGn

H

L

L

X

L

QAn

QGn

QGn

H

L

H

X

H

QAn

QGn

QGn

H

L

L

X

L

QAn

QGn

QGn

H

X

H

X

X

NO CHANGE

H

H

X

X

X

NO CHANGE

a.......h: The level of steady input voltage at inputs A through H respectively

QAn - QGn : The level of QA -QG, respectively, before the most-recent transition of the clock.

LOGIC DIAGRAM

M54/M74HCT165

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