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LM2852YMXA-1.0 数据表(PDF) 2 Page - National Semiconductor (TI) |
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LM2852YMXA-1.0 数据表(HTML) 2 Page - National Semiconductor (TI) |
2 / 14 page Connection Diagram TOP VIEW 20127003 MXA14A ETSSOP-14 Pin Descriptions AVIN (Pin 1): Chip bias input pin. This provides power to the logic of the chip. Connect to the input voltage or a separate rail. EN (Pin 2): Enable. Connect this pin to ground to disable the chip; connect to AVIN or leave floating to enable the chip; enable is internally pulled up. SGND (Pin 3): Signal ground. SS (Pin 4): Soft-start pin. Connect this pin to a small capaci- tor to control startup. The soft-start capacitance range is restricted to values 1 nF to 50 nF. NC (Pins 5, 12 and 13): No connect. These pins must be tied to ground or left floating in the application. PVIN (Pins 6, 7): Input supply pin. PVIN is connected to the input voltage. This rail connects to the source of the internal power PFET. SW (Pins 8, 9): Switch pin. Connect to the output inductor. PGND (Pins 10, 11): Power ground. Connect this to an internal ground plane or other large ground plane. SNS (Pin 14): Output voltage sense pin. Connect this pin to the output voltage as close to the load as possible. Exposed Pad: Connect to ground. www.national.com 2 |
类似零件编号 - LM2852YMXA-1.0 |
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类似说明 - LM2852YMXA-1.0 |
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