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ISL54050 数据表(PDF) 6 Page - Intersil Corporation |
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ISL54050 数据表(HTML) 6 Page - Intersil Corporation |
6 / 12 page 6 FN6356.2 June 11, 2007 Test Circuits and Waveforms Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 1B. TEST CIRCUIT FIGURE 1. SWITCHING TIMES FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUIT FIGURE 2. CHARGE INJECTION FIGURE 3A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 3B. TEST CIRCUIT FIGURE 3. BREAK-BEFORE-MAKE TIME 50% tr < 5ns tf < 5ns tOFF 90% V+ 0V VNO 0V tON LOGIC INPUT SWITCH INPUT SWITCH OUTPUT 90% VOUT V OUT V (NO or NC) R L R L r ON () + ---------------------------- = SWITCH INPUT LOGIC INPUT VOUT RL CL COM NO or NC IN 50 Ω 35pF GND V+ C VOUT ΔVOUT ON OFF ON Q = ΔVOUT x CL SWITCH OUTPUT LOGIC INPUT V+ 0V CL VOUT RG VG GND COM NO or NC V+ C LOGIC INPUT IN Repeat test for all switches. 90% V+ 0V tD LOGIC INPUT SWITCH OUTPUT 0V VOUT LOGIC INPUT IN COM RL CL VOUT 35pF 50 Ω NO NC V+ GND VNX C ISL54050 |
类似零件编号 - ISL54050 |
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类似说明 - ISL54050 |
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