1

®

FN6164.2

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ISL51002

10-Bit Video Analog Front End (AFE) with

Measurement and Auto-Adjust Features

The ISL51002 3-channel, 10-bit Analog Front End (AFE)

contains all the functionality needed to digitize analog YPbPr

video from HDTV tuners, settop boxes, SD and HD DVDs,

as well as RGB graphics signals from personal computers

and workstations. The fourth generation analog design

delivers 10-bit performance and a 165MSPS maximum

conversion rate supporting resolutions up to 1080p/UXGA at

60Hz. The front end's programmable input bandwidth

ensures sharp, low noise images at all resolutions.

To accelerate and simplify mode detection, the ISL51002

integrates a sophisticated set of measurement tools that fully

characterizes the video signal and timing, offloading the host

microcontroller. Automatic Black Level Compensation

(ABLC™) eliminates part-to-part offset variation, ensuring

perfect black level performance in every application.

The ISL51002's Digital PLL generates a pixel clock from the

analog source's HSYNC or SOG (Sync-On-Green) signals.

Pixel clock output frequencies range from 10MHz to 165MHz

with sampling clock jitter of 250ps peak to peak.

Applications

•Flat Panel TVs

• Front/Rear Projection TVs

• PC LCD Monitors and Projectors

• High Quality Scan Converters

• Video/Graphics Processing

Features

• Automatic sampling phase adjustment

• 10-bit triple Analog to Digital Converters with

oversampling up to 8x in video modes

• 165MSPS maximum conversion rate (ISL51002CQZ-165)

• Robust, glitchless Macrovision®-compliant sync separator

• Analog VCR “Trick Mode” support

• ABLC™ for perfect black level performance

• 4 channel input multiplexer

• Precision sync timing measurement

• RGB to YUV color space converter

• Low PLL clock jitter (250ps p-p)

• Programmable input bandwidth (10MHz to 450MHz)

• 64 interpixel sampling positions

• ±6dB gain adjustment rate

• Pb-free (RoHS compliant)

Related Literature

• Technical Brief TB363 “Guidelines for Handling and

Processing Moisture Sensitive Surface Mount Devices

(SMDs)”.

Simplified Block Diagram

PGA

10-BIT ADC

+

OFFSET

DAC

ABLC™

10

x3

SYNC

PROCESSING

DIGITAL PLL

VOLTAGE

CLAMP

COLOR SPACE

CONVERTER

3

3

3

3

2

MEASUREMENT, AUTOADJUST, AFE CONFIGURATION AND CONTROL

Data Sheet

September 19, 2007