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ISL45042AIRZ 数据表(PDF) 5 Page - Intersil Corporation

部件名 ISL45042AIRZ
功能描述  LCD Module Calibrator
Download  8 Pages
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

ISL45042AIRZ 数据表(HTML) 5 Page - Intersil Corporation

  ISL45042AIRZ Datasheet HTML 1Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 2Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 3Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 4Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 5Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 6Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 7Page - Intersil Corporation ISL45042AIRZ Datasheet HTML 8Page - Intersil Corporation  
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5
FN6158.3
August 29, 2007
Figure 2. It then takes a maximum of 100ms for the
programming to be completed inside the device.
When the part is programmed, the counter setting is loaded
into the non-volatile memory. This value will be loaded from
the nonvolatile memory during initial power-up or when the
CE pin is pulled low.
Once the programming is completed, it is recommended that
the user float the CLT pin. The CTL pin is internally tied to a
resistor network connected to ground. If left floating, the
voltage at the CTL pin will equal VDD/2. Under these
conditions, no additional pulses will be seen by the Up/Down
counter via the CTL pin. To prevent further programming,
ground the CE pin.
CTL should have a noise filter to reduce bouncing or noise
on the input that could cause unwanted counting when the
CE pin is high. The board should have an additional ESD
protection circuit, with a series 1k
Ω resistor and a shunt
0.01µF capacitor connected on the CTL pin. (See Figure 3)
To avoid unintentional adjustment, the ISL45042A
guarantees to reject CTL pulses shorter than 20µs.
During Initial Power-up (only), to avoid the possibility of a
false pulse (since the internal comparators come up in an
unknown state), the very first CTL pulse is ignored. See
Figure 7 for the timing information.
CE Pin
To adjust the output voltage, the CE pin must be pulled high
(VDD). The CE pin has an internal pull-down resistor to
prevent unwanted reprogramming of the EEPROM. The
impedance of this resistor is 400k
Ω to 500kΩ (RINTERNAL
Figure 6).
The CE pin has a Schmitt trigger on the input to prevent
false triggering during slow transitions of the CE pin.
Transitions of the CE pin are recommended to be less than
10µs.
Replacing Existing Mechanical Potentiometer
Circuits
Figure 4 shows the common adjustment mechanical circuits
and equivalent replacement with the ISL45042A.
Expected Output Voltage
The ISL45042A provides an output sink current, which
lowers the voltage on the external voltage divider (VCOM
output voltage). Equation 1 and Equation 2 can be used to
calculate the output current (IOUT) and output voltage
(VOUT) values.
NOTE: Where setting is an integer between 1 and 128.
CTL VOLTAGE
TIME
4.9V
CTLPT
FIGURE 2. EEPROM PROGRAMMING
>200µs
I
OUT
Setting
128
--------------------- x
AV
DD
20 R
SET
()
---------------------------
=
V
OUT
R
2
R
1
R
2
+
---------------------
⎝⎠
⎜⎟
⎛⎞
AV
DD 1
Setting
128
--------------------- x
R
1
20 R
SET
()
---------------------------
⎝⎠
⎜⎟
⎛⎞
=
(EQ. 1)
(EQ. 2)
FIGURE 3. EXTERNAL ESD PROTECTION ON CTL PIN
ISL45042A
CTL
0.01µF
1k
Ω
-
+
Ra
Rb
Rc
RSET
-
+
ISL45042A
SET
OUT
AVDD
R1
R2
AVDD
VCOM
VCOM
AVDD
R1 = Ra
R2 = Rb + Rc
RSET = (Ra(Rb + Rc)) / 20Rb
FIGURE 4. EXAMPLE OF THE REPLACEMENT FOR THE MECHANICAL POTENTIOMETER CIRCUIT USING THE ISL45042A
ISL45042A


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