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ISL45041_0608 数据表(PDF) 5 Page - Intersil Corporation

部件名 ISL45041_0608
功能描述  TFT-LCD I2C Programmable VCOM Calibrator
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

ISL45041_0608 数据表(HTML) 5 Page - Intersil Corporation

  ISL45041_0608 Datasheet HTML 1Page - Intersil Corporation ISL45041_0608 Datasheet HTML 2Page - Intersil Corporation ISL45041_0608 Datasheet HTML 3Page - Intersil Corporation ISL45041_0608 Datasheet HTML 4Page - Intersil Corporation ISL45041_0608 Datasheet HTML 5Page - Intersil Corporation ISL45041_0608 Datasheet HTML 6Page - Intersil Corporation ISL45041_0608 Datasheet HTML 7Page - Intersil Corporation  
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5
FN6189.2
August 29, 2006
Application Information
This device provides the ability to reduce the flicker of an LCD
panel by adjustment of the VCOM voltage during production
test and alignment. A 128-step resolution is provided under
digital control, which adjusts the sink current of the output.
The output is connected to an external voltage divider, so that
the device will have the capability to reduce the voltage on the
output by increasing the output sink current.
The adjustment of the output is provided by the 2-wire I2C
serial interface.
Expected Output Voltage
The ISL45041 provides an output sink current, which lowers
the voltage on the external voltage divider (VCOM output
voltage). Equation 1 and Equation 2 can be used to calculate
the output current (IOUT) and output voltage (VOUT) values.
NOTE: Where setting is an integer between 1 and 128.
Table 1 gives the calculated value of VOUT for the evaluation
board using the on-board resistors values of: RSET = 24.9k,
R1 = 200k, R2 = 243k, and AVDD = 10V.
RSET Resistor
The external RSET resistor sets the full-scale sink current that
determines the lowest voltage of the external voltage divider R1
and R2 (Figure 1). The voltage difference between the VOUT
pin and ISET pin (Figure 2) has to be greater than 1.75V. This
will keep the output MOS transistor in the saturation region.
Expected current settings and 7-Bit accuracy occurs when the
output MOS transistor is operating in the saturation region.
Figure 2 shows the internal connection for the output MOS
transistor. The value of the AVDD supply sets the voltage at the
source of the output transistor. This voltage is equal to
(Setting/128) x (AVDD/20). The ISET current is therefore equal
to (Setting/128) x (AVDD/20 x RSET). The value of the Drain
voltage is found using Equation 2. The values of R1 and R2
(Equation 2) should be determined (setting equal to 128) so the
minimum value of VOUT is greater than 1.75V + AVDD/20.
Ramp-Up of the VDD Power Supply
It is required that the ramp-up from 10% VDD to 90% VDD
level be achieved in less than or equal to 10ms to assure
that the EEPROM and Power-on-reset circuits are
synchronized and the correct value is read from the
EEPROM Memory.
TABLE 1.
SETTING VALUE
VOUT
1
5.468
10
5.313
20
5.141
30
4.969
40
4.797
50
4.625
60
4.453
70
4.281
80
4.109
90
3.936
100
3.764
110
3.592
128
3.282
RSET
FIGURE 1. OUTPUT CONNECTION CIRCUIT EXAMPLE
-
+
ISL45041
SET
OUT
AVDD
R1
R2
AVDD
ISET
I
OUT
Setting
128
--------------------- x
AV
DD
20 R
SET
()
---------------------------
=
V
OUT
R
2
R
1
R
2
+
---------------------
⎝⎠
⎜⎟
⎛⎞
AV
DD 1
Setting
128
--------------------- x
R
1
20 R
SET
()
---------------------------
⎝⎠
⎜⎟
⎛⎞
=
(EQ. 1)
(EQ. 2)
FIGURE 2. OUTPUT CONNECTION CIRCUIT EXAMPLE
AVDD = 15V
RSET
VOUT PIN
R1
R2
AVDD
VSAT
0.5V
ISET PIN
SETTING
128
---------------------------- x
AV
DD
20
------------------
ISL45041


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