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AD8368-EVALZ 数据表(PDF) 4 Page - Analog Devices |
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AD8368-EVALZ 数据表(HTML) 4 Page - Analog Devices |
4 / 20 page AD8368 Rev. A | Page 4 of 20 VS = 5 V, TA = 25°C, system impedance Z0 = 50 Ω, VMODE = 5 V, RF input = 140 MHz, unless otherwise noted. Table 2. Parameter Min Typ Max Unit Conditions SQUARE LAW DETECTOR (DETI, DETO) Output Setpoint −11 dBm OUTP connected to DETI DETI DC Bias Level to ICOM VS/2 V DETI Impedance 710 Ω 0.6 pF DETO Output Range1 0.1 VS/2 V AGC Step Response 30 μs For −6 dB input power step (CDETO = 1 nF) MODE CONTROL INTERFACE (MODE) MODE Threshold 3.5 V MODE Input Bias Current 50 μA POWER INTERFACE (VPSI, VPSO) Supply Voltage 4.5 5 5.5 V Total Supply Current 60 mA ENBL high Disable Current 2 mA ENBL low ENABLE INTERFACE (ENBL) Enable Threshold 2.5 V Enable Response Time 1.5 μs Time delay following off-to-on transition until output reaches 90% of final value 3 μs Time delay following on-to-off transition until supply current is less than 5 mA ENBL Input Bias Current 150 μA VENBL = 5 V 1 Refer to AGC Operation section. |
类似零件编号 - AD8368-EVALZ |
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类似说明 - AD8368-EVALZ |
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