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AD7991YRJZ-0500RL7 数据表(PDF) 9 Page - Analog Devices |
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AD7991YRJZ-0500RL7 数据表(HTML) 9 Page - Analog Devices |
9 / 28 page AD7991/AD7995/AD7999 Rev. 0 | Page 9 of 28 I2C TIMING SPECIFICATIONS Guaranteed by initial characterization. All values were measured with the input filtering enabled. CB refers to the capacitive load on the bus line, with tr and tf measured between 0.3 VDD and 0.7 VDD (see Figure 2). Unless otherwise noted, VDD = 2.7 V to 5.5 V and TA = TMIN to TMAX. Table 5. Limit at tMIN, tMAX Parameter Conditions Min Typ Max Unit Description fSCL1 Standard mode 100 kHz Serial clock frequency Fast mode 400 kHz High speed mode CB = 100 pF maximum 3.4 MHz CB = 400 pF maximum 1.7 MHz t11 Standard mode 4 μs tHIGH, SCL high time Fast mode 0.6 μs High speed mode CB = 100 pF maximum 60 ns CB = 400 pF maximum 120 ns t21 Standard mode 4.7 μs tLOW, SCL low time Fast mode 1.3 μs High speed mode CB = 100 pF maximum 160 ns CB = 400 pF maximum 320 ns t31 Standard mode 250 ns tSU;DAT, data setup time Fast mode 100 ns High speed mode 10 ns t41, 2 Standard mode 0 3.45 μs tHD;DAT, data hold time Fast mode 0 0.9 μs High Speed mode CB = 100 pF maximum 0 703 ns CB = 400 pF maximum 0 150 ns t51 Standard mode 4.7 μs tSU;STA, setup time for a repeated start condition Fast mode 0.6 μs High Speed mode 160 ns t61 Standard mode 4 μs tHD;STA, hold time for a repeated start condition Fast mode 0.6 μs High speed mode 160 ns t71 Standard mode 4.7 μs tBUF, bus-free time between a stop and a start condition Fast mode 1.3 μs t81 Standard mode 4 μs tSU;STO, setup time for a stop condition Fast mode 0.6 μs High speed mode 160 ns t9 Standard mode 1000 ns tRDA, rise time of the SDA signal Fast mode 20 + 0.1 CB 300 ns High speed mode CB = 100 pF maximum 10 80 ns CB = 400 pF maximum 20 160 ns |
类似零件编号 - AD7991YRJZ-0500RL7 |
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类似说明 - AD7991YRJZ-0500RL7 |
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