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74LVT240, 74LVTH240 Rev. 1.5.0

January 2008

74LVT240, 74LVTH240

Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs

Features

pull-up resistors to hold unused inputs (74LVTH240),

also available without bushold feature (74LVT240)

bus loading

– Human-body model

> 2000V

– Machine model

> 200V

– Charged-device model

> 1000V

General Description

The LVT240 and LVTH240 are inverting octal buffers

and line drivers designed to be employed as memory

address drivers, clock drivers and bus oriented transmit-

ters or receivers which provides improved PC board

density.

The LVTH240 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

These octal buffers and line drivers are designed for low-

provide a TTL interface to a 5V environment. The LVT240

and LVTH240 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining low power dissipation.

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Order Number

Package

Number

Package Description

74LVT240WM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVT240SJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVT240MSA

MSA20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74LVT240MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74LVTH240WM

M20B

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74LVTH240SJ

M20D

20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LVTH240MSA

MSA20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74LVTH240MTC

MTC20

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide