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74AHCT00BQ 数据表(PDF) 6 Page - NXP Semiconductors |
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74AHCT00BQ 数据表(HTML) 6 Page - NXP Semiconductors |
6 / 13 page 74AHC_AHCT00_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 8 January 2008 6 of 13 NXP Semiconductors 74AHC00; 74AHCT00 Quad 2-input NAND gate [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching Σ(C L × VCC 2 × f o) = sum of the outputs. 11. Waveforms For type 74AHCT00 tpd propagation delay nA, nB to nY; see Figure 6 [2] VCC = 4.5 V to 5.5 V CL = 15 pF - 3.3 6.9 1.0 8.0 1.0 9.0 ns CL = 50 pF - 4.5 7.9 1.0 9.0 1.0 10.0 ns CPD power dissipation capacitance CL = 50 pF; fi = 1 MHz; VI = GND to VCC [3] - 7.0 - - - - - pF Table 7. Dynamic characteristics …continued GND = 0 V; For test circuit see Figure 7. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. The input (nA, nB) to output (nY) propagation delays 001aah088 tPHL tPLH VM VM nY output nA, nB input VI GND VOH VOL Table 8. Measurement points Type Input Output VM VM 74AHC00 0.5VCC 0.5VCC 74AHCT00 1.5 V 0.5VCC |
类似零件编号 - 74AHCT00BQ |
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类似说明 - 74AHCT00BQ |
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