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74V2G00 数据表(PDF) 1 Page - STMicroelectronics |
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74V2G00 数据表(HTML) 1 Page - STMicroelectronics |
1 / 6 page 74V2G00 DUAL 2-INPUT NAND GATE ® June 2000 s HIGH SPEED: tPD = 3.7 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1 µA (MAX.) at TA =25 oC s HIGH NOISE IMMUNITY: VNIH =VNIL =28% VCC (MIN.) s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH|=IOL = 8 mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2G00 is an advanced high-speed CMOS DUAL 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T UBE T & R SOT23-8L 74V2G00STR SOT23-8L 1/6 |
类似零件编号 - 74V2G00 |
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类似说明 - 74V2G00 |
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