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74ACT20B 数据表(PDF) 1 Page - STMicroelectronics |
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74ACT20B 数据表(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/8 April 2001 s HIGH SPEED: tPD = 5ns (TYP.) at VCC = 5V s LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C s COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), VIL = 0.8V (MAX.) s 50 Ω TRANSMISSION LINE DRIVING CAPABILITY s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 20 s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74ACT20 is an advanced high-speed CMOS DUAL 4-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages in- cluding buffer output, which enables high noise immunity and stable output. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74ACT20 DUAL 4-INPUT NAND GATE PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP 74ACT20B SOP 74ACT20M 74ACT20MTR TSSOP 74ACT20TTR TSSOP DIP SOP |
类似零件编号 - 74ACT20B |
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类似说明 - 74ACT20B |
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