1/15

July 2004

s

HIGH SPEED:

s

COMPATIBLE WITH TTL OUTPUTS

s

LOW POWER DISSIPATION:

s

LOW NOISE:

s

75

Ω TRANSMISSION LINE DRIVING

CAPABILITY

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

PCI BUS LEVELS GUARANTEED AT 24 mA

s

BALANCED PROPAGATION DELAYS:

s

OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 299

s

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVQ299 is a low voltage CMOS 8 BIT

PIPO SHIFT REGISTER (3-STATE) fabricated

with sub-micron silicon gate and double-layer

power and low noise 3.3V applications.

These devices have four modes (HOLD, SHIFT

LEFT, SHIFT RIGHT and LOAD DATA). Each

mode is chosen by two function select inputs (S0,

S1) as shown in the Truth Table.

When one or both enable inputs, (G1, G2) are

high, the eight input/output terminals are in the

high

impedance

state;

however

sequential

operation or clearing of the register is not affected.

Clear function is asynchronous to clock.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

74LVQ299

8 BIT PIPO SHIFT REGISTER

WITH ASYNCHRONOUS CLEAR

Figure 1: Pin Connection And IEC Logic Symbols

Table 1: Order Codes

PACKAGE

T & R

SOP

74LVQ299MTR

TSSOP

74LVQ299TTR

TSSOP

SOP

Rev. 2