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74AC253 数据表(PDF) 2 Page - Fairchild Semiconductor

部件名 74AC253
功能描述  Dual 4-Input Multiplexer with 3-STATE Outputs
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
标志 FAIRCHILD - Fairchild Semiconductor

74AC253 数据表(HTML) 2 Page - Fairchild Semiconductor

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©1988 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74AC253, 74ACT253 Rev. 1.5
2
Logic Diagram
IEEE/IEC
Functional Description
The AC/ACT253 contains two identical 4-input multiplex-
ers with 3-STATE outputs. They select two bits from four
sources selected by common Select inputs (S0, S1). The
4-input multiplexers have individual Output Enable (OEa,
OEb) inputs which, when HIGH, force the outputs to a
high impedance (High Z) state. This device is the logic
implementation of a 2-pole, 4-position switch, where the
position of the switch is determined by the logic levels
supplied to the two select inputs. The logic equations for
the outputs are shown:
Za = OEa •(I0a • S1 • S0 + I1a • S1 • S0 +
I2a • S1 • S0 + I3a • S1 • S0)
Zb = OEb •(I0b • S1 • S0 + I1b • S1 • S0 +
I2b • S1 • S0 + I3b • S1 • S0)
If the outputs of 3-STATE devices are tied together, all
but one device must be in the high impedance state to
avoid high currents that would exceed the maximum
ratings. Designers should ensure that Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so that there is no overlap.
Truth Table
Address Inputs S0 and S1 are common to both sections.
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Z
= High Impedance
Select Inputs
Data Inputs
Output Enable
Outputs
S0
S1
I0
I1
I2
I3
OE
Z
XXXXXX
H
Z
LLL
X
X
X
L
L
LL
H
XXX
L
H
H
LXLX
X
L
L
HL
XHX
X
L
H
LH
X
XLX
L
L
LH
X
XHX
L
H
HH
XXX
L
L
L
HH
XXX
H
L
H


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