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74LVC1G10GM 数据表(PDF) 6 Page - NXP Semiconductors

部件名 74LVC1G10GM
功能描述  Single 3-input NAND gate
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

74LVC1G10GM 数据表(HTML) 6 Page - NXP Semiconductors

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74LVC1G10_1
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 2 October 2007
6 of 14
NXP Semiconductors
74LVC1G10
Single 3-input NAND gate
11. Dynamic characteristics
[1]
Typical values are measured at Tamb =25 °C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2]
tpd is the same as tPLH and tPHL.
[3]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of the outputs.
12. Waveforms
Table 8.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.
Symbol Parameter
Conditions
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
tpd
propagation delay
A, B and C to Y; see Figure 7
[2]
VCC = 1.65 V to 1.95 V
1.5
4.7
18.0
1.5
21.5
ns
VCC = 2.3 V to 2.7 V
1.0
3.0
6.5
1.0
7.8
ns
VCC = 2.7 V
1.0
3.0
6.0
1.0
7.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.6
5.0
1.0
6.2
ns
VCC = 4.5 V to 5.5 V
1.0
1.9
3.6
1.0
4.4
ns
CPD
power dissipation
capacitance
VI = GND to VCC; VCC = 3.3 V
[3]
-12-
-
-
pF
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7.
The input (A, B, C) to output (Y) propagation delays
001aag692
tPLH
VM
VM
tPHL
VI
A, B, C,
input
Y output
GND
VOH
VOL


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