TC5747 datasheet(4/44 Pages) ETC2

部件名	TC5747

功能描述	Single Chip CMOS Imager with Integrated Image Signal Processor and JPEG Codec

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制造商	ETC2 [List of Unclassifed Manufacturers]

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List of Figures

FIGURE 1: TC5747 FUNCTIONAL BLOCK DIAGRAM ......................................................................................................... 5

FIGURE 2: BAYER GRID CONFIGURATION ......................................................................................................................... 7

FIGURE 3: INITIALIZATION SEQUENCE............................................................................................................................. 12

FIGURE 4: I2C INTERFACE START AND STOP CONDITIONS ........................................................................................... 14

FIGURE 5: I2C PROTOCOL................................................................................................................................................ 14

FIGURE 6: I2C HOST-WRITE ACCESS............................................................................................................................... 15

FIGURE 7: I2C HOST-READ ACCESS ................................................................................................................................ 15

FIGURE 8: I2C HOST-READ MULTIPLE (N) ACCESSES ..................................................................................................... 16

FIGURE 9: PVI QUALIFICATION SIGNAL TIMING ............................................................................................................. 17

FIGURE 10: VERTICAL AND HORIZONTAL QUALIFY SIGNALS.......................................................................................... 17

FIGURE 11: PVI BAYER OUTPUT FORMAT ...................................................................................................................... 18

FIGURE 12: PVI YUV OUTPUT FORMAT ......................................................................................................................... 19

FIGURE 13: RGB 565 OUTPUT ON PARALLEL VIDEO OUTPUT INTERFACE...................................................................... 19

FIGURE 14: VALIDH AS A WRITE SIGNAL, ACTIVE LOW................................................................................................ 20

FIGURE 15: VALIDH AS A WRITE SIGNAL, ACTIVE HIGH .............................................................................................. 20

FIGURE 16: FRAME RATE CONTROL................................................................................................................................ 20

FIGURE 17: RGB666 THREE-TRANSFERS MODE ............................................................................................................. 22

FIGURE 18: SERIAL DATA-OUT INTERFACE – X2_CLK_OUT = 1 ...................................................................................... 26

FIGURE 19: SERIAL DATA-OUT INTERFACE – X2_CLK_OUT = 0 ...................................................................................... 26

FIGURE 20: SINGLE BYTE TRANSFER MODE.................................................................................................................... 27

FIGURE 21: PARALLEL VIDEO OUTPUT CLOCK QUALIFIED MODE .................................................................................. 31

FIGURE 22: PARALLEL VIDEO OUTPUT CAMERA INTERFACE MODE ............................................................................... 31

FIGURE 23: PARALLEL VIDEO OUTPUT INTERFACE SIGNALS .......................................................................................... 32

FIGURE 24: SERIAL VIDEO OUTPUT INTERFACE SIGNALS ............................................................................................... 32

FIGURE 25: SERIAL VIDEO OUTPUT CLOCK QUALIFIED MODE AC.................................................................................. 33

FIGURE 26: SERIAL VIDEO OUTPUT SSI MODE................................................................................................................ 33

FIGURE 27: I2C-COMPATIBLE INTERFACE ....................................................................................................................... 34

FIGURE 28: TC5747 24-PIN MODULE MECHANICAL DRAWING....................................................................................... 36

FIGURE 29: TC5747 24-PIN MODULE MECHANICAL DRAWING CONTINUED................................................................... 37

类似零件编号 - TC5747

制造商	部件名	数据表	功能描述
Toshiba Semiconductor	TC574200D	326Kb / 12P	262,144 WORD x 16 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY
	TC574200D-10	326Kb / 12P	262,144 WORD x 16 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY
	TC574200D-120	326Kb / 12P	262,144 WORD x 16 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY
	TC574200D-150	326Kb / 12P	262,144 WORD x 16 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY

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类似说明 - TC5747

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