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SN74CBTLV3861DWG4 数据表(PDF) 1 Page - Texas Instruments

部件名 SN74CBTLV3861DWG4
功能描述  LOW-VOLTAGE 10-BIT FET BUS SWITCH
Download  14 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

SN74CBTLV3861DWG4 数据表(HTML) 1 Page - Texas Instruments

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SN74CBTLV3861
LOW VOLTAGE 10BIT FET BUS SWITCH
SCDS041H − DECEMBER 1997 − REVISED OCTOBER 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 5-Ω Switch Connection Between Two Ports
D Rail-to-Rail Switching on Data I/O Ports
D Ioff Supports Partial-Power-Down Mode
Operation
D Flow-Through Architecture Optimizes PCB
Layout
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
description/ordering information
The SN74CBTLV3861 provides ten bits of
high-speed bus switching. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
The device is organized as one 10-bit bus switch.
When output enable (OE) is low, the 10-bit bus
switch is on, and port A is connected to port B.
When OE is high, the switch is open, and the
high-impedance state exists between the two
ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP − DBQ
Tape and reel
SN74CBTLV3861DBQR
CL861
SOIC − DW
Tube
SN74CBTLV3861DW
CBTLV3861
−40
°C to 85°C
SOIC − DW
Tape and reel
SN74CBTLV3861DWR
CBTLV3861
−40
°C to 85°C
SOP − NS
Tape and reel
SN74CBTLV3861NSR
CBTLV3861
TSSOP − PW
Tape and reel
SN74CBTLV3861PWR
CL861
TVSOP − DGV
Tape and reel
SN74CBTLV3861DGVR
CL861
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
Copyright
 2003, Texas Instruments Incorporated
DBQ, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
NC
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
NC − No internal connection
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.


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