LA73062V

No.A0909-5/12

Block Diagram

Please shorten the distance of the bold line to prevent oscillation.

VCC_HD

1 F

Py/G_IN

Pr/R_IN

Pb/B_IN

GND_HD

Pb/B_OUT

Py/G_OUT

VCC_DR_HD

Pr/R_OUT

30MHz

LPF

Driver

MUTE

SW5

Driver

Driver

MUTE

SW5

MUTE

SW5

6dB

N.C.

6dB

6dB

D_LINE3_IN

(High/Open/Low)

CLAMP

D_LINE2_IN

(High/Low)

D_LINE1_OUT

5V/2.2V/0V

5V/0V

5V/2.2V/0V

SW2:Power

Save CTL

GND_DR_HD

Y_IN

0.1 F

C_IN

GND_SD

SW1:SD Mute CTL

C_OUT

S_DET_OUT

VCC_DR_SD

CLAMP

6MHz

LPF

6MHz

LPF

6MHz

LPF

BIAS

100k

+

Driver

MUTE

6dB

Driver

MUTE

6dB

Driver

MUTE

6dB

VCC_SD

D_LINE1_IN

(High/Open/Low)

SW5:HD Mute CTL

S_DET_IN

(High/Open/Low)

GND_DR_SD

SW3:Input CTL

(CLAMP or BIAS)

CLAMP

BIAS

100k

SW3

CLAMP

BIAS

100k

SW3

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

+

75

75

+

1000 F

+

12MHz

LPF

SW4

30MHz

LPF

12MHz

LPF

SW4

30MHz

LPF

12MHz

LPF

SW4

REG3V

SW4:Firter CTL

(12MHz or 30MHz)

SW1

SW1

SW1

D_LINE2_OUT

D_LINE3_OUT

N.C.

+

N.C.

VREG_3V

CV_OUT

Y_OUT

+

+

+

VREG_3V

REG3V

REG3V

+

+

+

0.1 F

1 F

1 F

75

75

1000 F

10k

75

1 F

75

47 F

10k

10k

75

75

10k

330 F

1000 F

75

75

75

75

330 F