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UC3842G-S08-T 数据表(PDF) 6 Page - Unisonic Technologies |
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UC3842G-S08-T 数据表(HTML) 6 Page - Unisonic Technologies |
6 / 8 page UC3842G LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 6 of 8 www.unisonic.com.tw QW-R103-036,A OPEN-LOOP TEST CIRCUIT 6 5 7 8 3 4 2 1 VREF VCC Output GND COMP FB CS CT VCC Rb 100k or VFB CT 3.3n 10p Ra 100k VIN VCOMP CIN 470μ Vpwl 5K adjust High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin5 in single point GND. UNDER-VOLTAGE LOCKOUT During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin6 should be shunt to GND with a bleeder resistor to prevent activing the power switch with output leakage currents. ERROR AMPLIFIER CONFIGURATION Error amplifier can source or sink up to 0.5mA |
类似零件编号 - UC3842G-S08-T |
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类似说明 - UC3842G-S08-T |
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