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TEA1610P 数据表(PDF) 8 Page - NXP Semiconductors

部件名 TEA1610P
功能描述  Zero-voltage-switching resonant converter controller
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

TEA1610P 数据表(HTML) 8 Page - NXP Semiconductors

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2001 Apr 25
8
Philips Semiconductors
Product specification
Zero-voltage-switching
resonant converter controller
TEA1610P; TEA1610T
Error amplifier
The error amplifier is a transconductance amplifier. Thus
the output current at pin VCO is determined by the
amplifier transconductance and the differential voltage on
input pins I
+ and I−. The output current IVCO is fed to the
IRS input of the current-controlled oscillator.
The source capability of the error amplifier increases
current in the IRS pin when the differential input voltage is
positive. Therefore the minimum current is determined by
resistor Rf(min) and the minimum frequency setting is
independent of the characteristics of the error amplifier.
The error amplifier has a maximum output current of
0.5 mA for an output voltage up to 2.5 V. If the source
current decreases, the oscillator frequency also decreases
resulting in a higher regulated output voltage.
During start-up, the output voltage of the amplifier is held
at a constant value of 2.5 V. This voltage level defines,
together with resistor R∆f, the initial switching frequency of
the TEA1610 after start-up.
Shut-down
The shut-down input (SD) has an accurate threshold level
of 2.33 V. When the voltage on input SD reaches 2.33 V,
both power switches immediately switch off and the
TEA1610 enters shut-down mode.
During shut-down mode, pin VDD is clamped by an internal
Zener diode at 12.0 V with 1 mA input current. This clamp
prevents VDD rising above the rating of 14 V due to low
supply current to the TEA1610 in shut-down mode.
When the TEA1610 is in the shut-down mode, it can be
activated again only by lowering VDD below the VDD reset
level (5.3 V typical). The shut-down latch is then reset and
a new start-up cycle can commence (see Fig.8).
handbook, full pagewidth
MGW002
oscillation
shut-
down
VDD
SD
GH-SH
GL
t
0
0
VDD(start)
VDD(sdc)
VDD(reset)
VSD(th)
supply
off
start-up
oscillation
Fig.8 Shut-down.


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