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TDA9962 数据表(PDF) 8 Page - NXP Semiconductors |
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TDA9962 数据表(HTML) 8 Page - NXP Semiconductors |
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8 / 24 page  2000 May 01 8 Philips Semiconductors Objective specification 12-bit, 3.0 V, 20 Msps analog-to-digital interface for CCD cameras TDA9962 CHARACTERISTICS VCCA =VCCD = 3.0 V; VCCO = 2.5 V; fpix = 20 MHz; Tamb =25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCCA analog supply voltage 2.7 3.0 3.6 V VCCD digital supply voltage 2.7 3.0 3.6 V VCCO digital outputs supply voltage 2.2 2.5 3.6 V ICCA analog supply current all clamps active − 49 − mA ICCD digital supply current − 2 − mA ICCO digital outputs supply current CL = 20 pF on all data outputs; input ramp response time is 800 µs − 1 − mA Digital inputs PINS SHP, SHD AND CLK (REFERENCED TO DGND) VIL LOW-level input voltage 0 − 0.6 V VIH HIGH-level input voltage 2.2 − 5.5 V Ii input current 0 ≤ Vi ≤ 5.5 V −3 − +3 µA Zi input impedance fCLK =20MHz − 50 − k Ω Ci input capacitance fCLK =20MHz −− 2pF PINS CLPDM, CLPOB, SEN, SCLK, SDATA, STBY, OE, BLK AND VSYNC VIL LOW-level input voltage 0 − 0.6 V VIH HIGH-level input voltage 2.2 − 5.5 V Ii input current 0 ≤ Vi ≤ 5.5 V −2 − +2 µA Clamps GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS tW(clamp) clamp active pulse width in number of pixels PGA code = 255 for maximum 4 LSB error 12 −− pixels INPUT CLAMP (DRIVEN BY CLPDM) gm(CDS) CDS input clamp transconductance − 20 − mS Correlated Double Sampling (CDS) Vi(CDS)(p-p) maximum peak-to-peak CDS input amplitude (video signal) VCC = 2.85 V 650 −− mV VCC ≥ 3.0 V 800 −− mV Vreset(max) maximum CDS input reset pulse amplitude 500 −− mV Ii(IN) input current into pin IN at floating gate level tbf − tbf µA Ci input capacitance − 2 − pF tCDS(min) CDS control pulses minimum active time Vi(CDS)(p-p) = 800 mV black-to-white transition in 1 pixel with 99% Vi recovery 11 15 − ns |
类似零件编号 - TDA9962 |
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类似说明 - TDA9962 |
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