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TDA9177 数据表(PDF) 5 Page - NXP Semiconductors |
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TDA9177 数据表(HTML) 5 Page - NXP Semiconductors |
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5 / 28 page  1997 Dec 01 5 Philips Semiconductors Product specification YUV transient improvement processor TDA9177 FUNCTIONAL DESCRIPTION Y-input selection and amplification The dynamic range of the luminance input amplifier and output amplifier can be switched between 0.315 V and 1.0 V typically (excluding sync), either externally (pin AMS) or by I2C-bus (bit AMS of the control register). Amplitudes outside the corresponding maximum specified range will be clipped smoothly. The sync part is processed transparently to the output, independently of the feature settings. The input is clamped during the HIGH period of the CLP, defined by the sandcastle reference, and should be DC-decoupled with an external capacitor. During the clamp pulse, an artificial black level is inserted in the input signal to correctly preset the internal circuitry. The input amplifier drives a delay line of four delay sections, which form the core of the sharpness improvement processor. Sharpness improvement processor The sharpness improvement processor increases the slope of large luminance transients of vertical objects and enhances transients of details in natural scenes by contour correction. It comprises three main processing units, these being the step improvement processor, the contour processor and the smart sharpness controller. STEP IMPROVEMENT PROCESSOR The step improvement processor (see Fig.9) comprises two main functions: 1. the MINMAX generator 2. the MINMAX fader. The MINMAX generator utilizes 5 taps of an embedded luminance delay line to calculate the minimum and maximum envelope of all signals momentarily stored in the delay line. The MINMAX fader chooses between the minimum and maximum envelopes, depending on the polarity of a decision signal derived from the contour processor. Figures 4, 5 and 6 show some waveforms of the step improvement processor and illustrate that fast transients result with this algorithm. The MINMAX generator also outputs a signal that represents the momentary envelope of the luminance input signal. This envelope information is used by the smart sharpness controller. Limited line width control (also called aperture control) can be performed externally (pin 4, LWC) or by I2C-bus (LW-DAC). Line width control can be used to compensate for horizontal geometry because of the gamma or blooming of the spot of the CRT. THE CONTOUR PROCESSOR The contour processor comprises two contour generators with different frequency characteristics. The contour generator generates a second-order derivative of the incoming luminance signal and is used both as a decision signal for the step improvement processor and as a luminance correction signal for the smart sharpness controller. In the smart sharpness controller, this correction signal is added to the proper delayed original luminance input signal, making up the peaking signal for detail enhancement. The peaking path is allowed to select either the narrow- or wide-peaked contour generators either externally (pin 8, CFS) or by I2C-bus (bit CFS in the control register). The step improvement circuitry always selects the wide-peaked contour filter. The contour generators utilize 3 taps (narrow band) or 5 taps (broad band) of the embedded luminance delay lines. Figures 11 and 12 illustrate the normalized frequency transfer of both the narrow and wide contour filters. SMART SHARPNESS CONTROLLER The smart sharpness controller (see Fig.10) is a fader circuit that fades between peaked luminance and step-improved luminance, defined by the output of a step discriminating device known as the step detector. It also contains a variable coring level stage. The step detector behaves like a band-pass filter, so both amplitude of the step and its slope add to the detection criterion. The smart sharpness controller has four user controls: 1. Steepness control 2. Peaking control 3. Coring level control 4. Smart Noise control. Control settings can be performed either by the I2C-bus or externally by pin, depending on the status of the I2C-bus bit STB. The steepness setting controls the amount of steepness in the edge-correction processing path. The peaking setting controls the amount of contour correction for proper detail enhancement. |
类似零件编号 - TDA9177 |
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类似说明 - TDA9177 |
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