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LM2240N 数据表(PDF) 8 Page - National Semiconductor (TI) |
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LM2240N 数据表(HTML) 8 Page - National Semiconductor (TI) |
8 / 10 page Astable Operation (Continued) VCC e Pin 16 TLH10837 – 10 GND e Pin 9 FIGURE 7 Cascaded Operation for Long Delays Binary Pattern Generation In astable operation as shown in Figures 8 and 9 the out- put of the LM2240 appears as a complex pulse pattern if more than one of its switches is closed The waveform of the output pulse train can be determined directly from the timing diagram of Figure 2 which shows the phase relations between the counter outputs Figures 10 and 11 show some of the complex pulse patterns that can be generated The pulse pattern repeats itself at a rate equal to the period of the highest counter bit connected to the common output bus The minimum pulse width contained in the pulse train is determined by the lowest counter bit connected to the out- put VCC e Pin 16 GND e Pin 9 TLH10837 – 11 FIGURE 8 Astable Operation with Trigger and Reset Inputs VCC e Pin 16 GND e Pin 9 TLH10837 – 12 FIGURE 9 Free Running Astable Operation TLH10837 – 13 FIGURE 10 Binary Pulse Patterns Obtained by Shorting Various Counter Outputs 8 |
类似零件编号 - LM2240N |
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类似说明 - LM2240N |
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