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TDA8003TS 数据表(PDF) 7 Page - NXP Semiconductors |
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TDA8003TS 数据表(HTML) 7 Page - NXP Semiconductors |
7 / 24 page 2000 Apr 20 7 Philips Semiconductors Product specification I2C-bus SIM card interface TDA8003TS Table 2 Description of the command bits; (all bits are cleared at reset) Table 3 Clock to the card at power-down Table 4 Description of the status bits; note 1 Note 1. In case of card extraction, supply drop-out or overload detection within a session, the card will be automatically deactivated, SIMERR pulled LOW, bit START = 0 and the corresponding status bit = 1. The status bit will be logic 0 and SIMERR will be released when the microcontroller reads out the status register, on the 7th SCL pulse. After a supply drop-out, SIMERR will be released at the end of the alarm pulse and bit SUPL = 1. SYMBOL BIT DESCRIPTION START/STOP 0 Logic 1 initiates an activation sequence and a cold reset procedure. Logic 0 initiates a deactivation sequence. WARM 1 Logic 1 initiates a warm reset procedure. TDA8003TS/C1: warm reset performed only when the 2 times 45000 CLK pulses have expired without answer from the card. TDA8003TS/C2: warm reset performed whatever the card has answered or not at the cold reset procedure but the count is 2 times 44745 CLK pulses. 3 V/5 VN 2 Logic 1 sets the card supply voltage VCC to 3 V. Logic 0 sets VCC to 5 V. PDOWN 3 Logic 1 applies on CLK the frequency defined by bits CLKPD1 and CLKPD2, and enters a reduced consumption mode. Logic 0 sets the circuit back to normal mode. CLKPD1 4 Bits 4 and 5 determine the clock to the card at power-down as shown in Table 3. CLKPD2 5 DT/DFN 6 Logic 1 sets fCLK to 1⁄2fSIMCLK (in active mode). Logic 0 sets fCLK to 1⁄4fSIMCLK. I/OEN 7 Logic 1 will transfer I/O to SIMI/O. Logic 0 sets I/O and SIMI/O to high-impedance. BIT 4 BIT 5 FUNCTION 0 0 clock stop LOW 0 1 clock stop HIGH 1 0 clock is 1 ⁄2fosc 1 1 no change SYMBOL BIT DESCRIPTION PRES 0 Logic 1 when the card is present. Logic 0 when the card is not present. PRESL 1 Logic 1 when the card has been extracted or inserted. Logic 0 when the status is read-out. − 2 Bit 2 is not used and is fixed to logic 0. SUPL 3 Logic 1 when the voltage supervisor has signalled a fault. Logic 0 when the status is read-out. PROT 4 Logic 1 when an overload has occurred during a session. Logic 0 when the status is read-out. MUTE 5 TDA8003TS/C1: Logic 1 when a card has not answered after 2 times 45000 CLK pulses. Logic 0 when the status is read-out. TDA8003TS/C2: Same as for C1, but the count is 2 times 44745 CLK pulses. EARLY 6 Logic 1 when a card has answered between 200 and 352 CLK cycles. Logic 0 when the status is read-out. ACTIVE 7 Logic 1 when the card is power-on. Logic 0 when the card is power-off. |
类似零件编号 - TDA8003TS |
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类似说明 - TDA8003TS |
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