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TDA1312 数据表(PDF) 7 Page - NXP Semiconductors |
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TDA1312 数据表(HTML) 7 Page - NXP Semiconductors |
7 / 13 page July 1993 7 Philips Semiconductors Preliminary specification Stereo continuous calibration DAC (CC-DAC) TDA1312A; TDA1312AT CHARACTERISTICS VDD = 5 V; Tamb = 25 °C; measured in Fig.1; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD positive supply voltage 4.0 5.0 5.5 V IDD supply current at code 0000H − 3.4 6.0 mA Digital inputs; pins WS, BCK and DATA I IL input leakage current LOW VI = 0 V −− 10 µA IIH input leakage current HIGH VI = 5 V −− 10 µA fBCK clock frequency −− 18.4 MHz BR bit rate data input −− 18.4 Mbits/s fWS word select input frequency −− 384 kHz Timing (see Fig.4) tr rise time −− 12 ns tf fall time −− 12 ns tCY bit clock cycle time 54 −− ns tBCKH bit clock pulse width HIGH 15 −− ns tBCKL bit clock pulse width LOW 15 −− ns tSU;DAT data set-up time 12 −− ns tHD:DAT data hold time to bit clock 2 −− ns tHD:WS word select hold time 2 −− ns tSU;WS word select set-up time 12 −− ns Analog outputs; pins VOL and VOR VFS full-scale voltage 1.8 2.0 2.2 V TCFS full-scale temperature coefficient −±400 − ppm VOFF offset voltage at code 1000H 0.42 0.47 0.52 V (THD+N)/S total harmonic distortion plus noise at 0 dB signal level; note 1 −−68 −63 dB − 0.04 0.07 % at −60 dB signal level; note 1 −−30 −24 dB − 36% at −60 dB signal level; A-weighted; note1 −−33 − dB − 2 − % at 0 dB signal level; f = 20 Hz to 20 kHz −−65 −61 dB − 0.05 0.09 % |
类似零件编号 - TDA1312 |
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类似说明 - TDA1312 |
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