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MC100LVEL92 数据表(PDF) 2 Page - ON Semiconductor |
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MC100LVEL92 数据表(HTML) 2 Page - ON Semiconductor |
2 / 8 page TND301 http://onsemi.com 2 Typical Clock Management System Clock Management of an electronic system (see Figure 1) depends on very accurate time keeping. A well–designed Clock Management scheme begins with a precise Clock Generator which is the standard Master Clock or Mean Time. The Master Clock is passed on to the Clock Distribution circuit which “fans out” multiple clocks throughout the system and activates individual events in the CPUs, ASICs, FPGAs, and Memory. All events are synchronized to the Master Clock and requires accurate devices to generate and distribute the clocks. Accurate devices are described as those with low jitter and low skew. Jitter is uncertainty in the location of the rising or falling edge of the signal (see Figure 2). Jitter can be random or deterministic. Jitter is called phase noise in the Master Clock and increases as it passes through each device. Noise from power supplies and crosstalk between signals also add to the total jitter. Jitter can be measured as peak–to–peak or RMS in picoseconds. Skew is a time offset of the clocks as they travel throughout the system (see Figure 3). Skew is defined as duty–cycle skew, within–device skew, or device–to–device skew. Skew is reduced by adjusting the delay of signals within the system. It is similar to propagation delay and is measured in picoseconds. Large values of jitter and skew on clocks reduce the maximum operating frequency of a system. Clock Generator CPU’s Master Clock PLL (Phase Locked Loop) with Crystal Clock Distribution Back Plane Additional Clock Distribution Clock Delay, Division and Translation ASIC’s FPGA’s Memory Figure 1. Typical Clock Management System Figure 2. Jitter Figure 3. Skew Skew OUT1 OUT2 Skew is a fixed difference between outputs caused by many factors including physi- cal layout, device process variations, and unbalanced loading conditions. Jitter is the uncertainty caused by many factors including power supply noise, signal crosstalk, and device physics. Jitter |
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类似说明 - MC100LVEL92 |
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