FAN6520A_06 datasheet(11/15 Pages) FAIRCHILD

部件名	FAN6520A

功能描述	Single Synchronous Buck PWM Controller

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制造商	FAIRCHILD [Fairchild Semiconductor]

网页	http://www.fairchildsemi.com

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11 / 15 page

www.fairchildsemi.com

FAN6520A Rev. 1.0.5

11

High-Side Losses

Figure 10 shows a MOSFET’s switching interval, with the

upper graph being the voltage and current on the drain-

to-source and the lower graph detailing VGS vs. time with

a constant current charging the gate. The x-axis, there-

fore, is also representative of gate charge (QG). CISS =

CGD + CGS and it controls t1, t2, and t4 timing. CGD

receives the current from the gate driver during t3 (as

VDS is falling). The gate charge (QG) parameters on the

lower graph are either specified or can be derived from

the MOSFET’s datasheet.

Assuming switching losses are about the same for both

the rising edge and falling edge, Q1’s switching losses

occur during the shaded time when the MOSFET has

voltage across it and current through it.

These losses are given by:

PUPPER = PSW + PCOND

(24)

where PUPPER is the upper MOSFET’s total losses, PSW

and PCOND are the switching and conduction losses for a

given MOSFET, RDS(ON) is at the maximum junction tem-

perature (TJ), and tS is the switching period (rise or fall

time) and is t2+t3 (Figure 10).

The driver’s impedance and CISS determine t2, while t3’s

period is controlled by the driver’s impedance and QGD.

Since most of tS occurs when VGS = VSP, use a constant

current assumption for the driver to simplify the calcula-

tion of tS:

Figure 10. Switching Losses and QG

Figure 11. Drive Equivalent Circuit

Most MOSFET vendors specify QGD and QGS. QG(SW)

can be determined as QG(SW) = QGD + QGS – QTH where

QTH is the gate charge required to reach the MOSFET

threshold (VTH). For the high-side MOSFET, VDS = VIN,

which can be as high as 20V in a typical portable appli-

cation. Care should be taken to include the delivery of

the MOSFET’s gate power (PGATE) in calculating the

power dissipation required:

PGATE = QG × VCC × FSW

(28)

where QG is the total gate charge to reach VCC.

P

SW

V

DS

I

L

×

2

------------------------

2

×

t

s

×

⎝⎠

⎛⎞

F

SW

=

(25)

P

COND

V

OUT

V

IN

-----------------

⎝⎠

⎜⎟

⎛⎞

I

OUT

2

×

R

DS ON

()

×

=

(26)

t

s

Q

GSW

()

I

DRIVER

--------------------------

Q

GSW

()

V

CC

V

SP

–

R

DRIVER

R

GATE

+

---------------------------------------------------------

⎝⎠

⎜⎟

⎛⎞

---------------------------------------------------------------

≈≈

(27)

V

SP

t1

t2

t3

4.5V

t4

t5

Q

G(SW)

V

DS

I

D

Q

GS

Q

GD

V

TH

V

GS

C

ISS

C

GD

C

ISS

CGD

RD

RGATE

CGS

HDRV

5V

SW

VIN

G

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