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FAN5182 数据表(PDF) 9 Page - Fairchild Semiconductor |
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FAN5182 数据表(HTML) 9 Page - Fairchild Semiconductor |
9 / 19 page © 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5182 Rev. 1.1.1 9 Theory of Operation The FAN5182 combines a multi-loop, fixed-frequency PWM control with multi-phase logic outputs for use in 1-, 2-, and 3-phase synchronous buck point-of-load power supplies. Multi-phase operation is important for producing the high current and low voltage demanded by auxiliary supplies in desktop computers, workstations, and servers. Handling high current in a single-phase converter places high thermal stress on components, such as inductors and MOSFETs, and is not preferred. The multi-loop control of the FAN5182 ensures a stable, high performance topology for: Balancing current and thermal between/among phases Fast response at the lowest possible switching frequency and output decoupling Reducing switching losses due to low-frequency operation Tight line and load regulation Reducing output ripple due to multiphase cancellation Better noise immunity to facilitate PCB layout Start-up Sequence During start-up, the number of operational phases and their phase relationship are determined by the internal circuitry that monitors the PWM outputs. Normally, the FAN5182 operates as a 3-phase PWM controller. Grounding the PWM3 pin programs the FAN5182 for 1- or 2-phase operation. When the FAN5182 is enabled, the controller outputs a voltage on PWM3, which is approximately 675mV. An internal comparator checks this pin's voltage versus a threshold of 300mV. If the PWM3 pin is grounded, it is below the threshold and the phase 3 is disabled. The output resistance of the PWM pin is approximately 5kΩ during this detection period. Any external pull-down resistance connected to the PWM pin should not be less than 25kΩ to ensure proper operation. PWM1 and PWM2 are disabled during the phase-detection interval, which occurs during the first two clock cycles of the internal oscillator. After this time, if the PWM3 output is not grounded, the 5kΩ resistance is disconnected, and PWM3 switches between 0V and 5V. If the PWM3 output is grounded, the controller operates in 1- and/or 2-phase. The PWM outputs logic-level signals to interface with external gate drivers, such as the FAN5109. Since each phase is able to operate close to 100% duty cycle, more than one PWM output can be on at the same time. Master Clock Frequency The clock frequency is set by an external resistor connected from the RT pin to ground. The frequency / resistor relationship follows the graph in Figure 4. To determine the frequency per phase, divide the clock frequency by the number of phases in use. NOTE: The exception is single-phase operation, in which the clock frequency must be set twice the single- phase frequency required. Output Voltage Differential Sensing The FAN5182 uses a differential low-offset voltage error amplifier to maintain ±2% differential sensing accuracy over temperature. The output voltage is sensed between the FB and FBRTN pins. The power supply output connects to the FB pin through a resistor divider and the FBRTN pin should be connected directly to the remote sense ground. The internal precision reference is referenced to FBRTN, which has a typical current of 100µA to allow accurate remote sensing. The internal error amplifier compares the precision reference to the FB pin to regulate the output voltage. Output Current Sensing The FAN5182 uses a current sense amplifier (CSA) to monitor the total output current for current-limit detection. Sensing the load current at the output gives the total average current being delivered to the load, which is an inherently more accurate method than peak current detection or sampling the current across a sense element, such as the low-side MOSFET. This amplifier can be configured according to the objectives of the system design: Output inductor DCR sensing without a thermistor (for lowest cost) Output inductor DCR sensing with a thermistor (for improved accuracy and moderate cost) Discrete resistor sensing (for best accuracy) The positive input of the CSA is connected to the CSREF pin and the CSREF is tied to the power supply output. The inverting input of the CSA, CSSUM, is the summing node of the load current sense through sensing elements (such as the switch node side of the output inductors). The feedback resistor between CSCOMP and CSSUM sets the gain of the amplifier and a filter capacitor is placed in parallel with this resistor. The gain of the amplifier is programmable by adjusting the feedback resistor. The current information is given as the difference between CSREF and CSCOMP. This “difference” signal is used as a differential input for the current limit comparator. To provide the best accuracy for sensing current, the CSA is designed to have low-input offset voltage. The CSA gain is determined by external resistors, so it can be set very accurately. |
类似零件编号 - FAN5182_07 |
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类似说明 - FAN5182_07 |
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