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AM70PDL129BDH66IT 数据表(PDF) 4 Page - SPANSION |
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AM70PDL129BDH66IT 数据表(HTML) 4 Page - SPANSION |
4 / 128 page 2 Am70PDL127BDH/Am70PDL129BDH November 25, 2003 AD VAN C E INFORM ATION FLASH MEMORY FEATURES (DATA STORAGE) AM29LV640M ARCHITECTURAL ADVANTAGES ■ Single power supply operation — 3 V for read, erase, and program operations ■ VersatileI/O ™ control — Device generates data output voltages and tolerates data input voltages on the DQ inputs/outputs as determined by the voltage on the VIO pin; operates from 1.65 to 3.6 V ■ Manufactured on 0.23 µm MirrorBit process technology ■ SecSi ™ (Secured Silicon) Sector region — 128-word/256-byte sector for permanent, secure identification through an 8-word/16-byte random Electronic Serial Number, accessible through a command sequence — May be programmed and locked at the factory or by the customer ■ Flexible sector architecture — One hundred twenty-eight 32 Kword sectors ■ Compatibility with JEDEC standards — Provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection ■ Minimum 100,000 erase cycle guarantee per sector ■ 20-year data retention at 125 °C PERFORMANCE CHARACTERISTICS ■ High performance — 110 ns access time — 30 ns page read times — 0.5 s typical sector erase time — 22 µs typical effective write buffer word programming time: 16-word write buffer reduces overall programming time for multiple-word updates — 4-word page read buffer — 16-word write buffer ■ Low power consumption (typical values at 3.0 V, 5 MHz) — 30 mA typical active read current — 50 mA typical erase/program current — 1 µA typical standby mode current SOFTWARE & HARDWARE FEATURES ■ Software features — Program Suspend & Resume: read other sectors before programming operation is completed — Erase Suspend & Resume: read/program other sectors before an erase operation is completed — Data# polling & toggle bits provide status — Unlock Bypass Program command reduces overall multiple-word programming time — CFI (Common Flash Interface) compliant: allows host system to identify and accommodate multiple flash devices ■ Hardware features — Sector Group Protection: hardware-level method of preventing write operations within a sector group — Temporary Sector Unprotect: V ID-level method of changing code in locked sectors — WP#/ACC input: Write Protect input (WP#) protects first or last sector regardless of sector protection settings ACC (high voltage) accelerates programming time for higher throughput during system production — Hardware reset input (RESET#) resets device — Ready/Busy# output (RY/BY#) indicates program or erase cycle completion pSRAM Features ■ Power dissipation — Operating: 40 mA maximum — Standby: 70 µA maximum — Deep power-down standby: 5 µA ■ CE1s# and CE2ps Chip Select ■ Power down features using CE1s# and CE2ps ■ Data retention supply voltage: 2.7 to 3.3 volt ■ Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8) ■ 8-word page mode access |
类似零件编号 - AM70PDL129BDH66IT |
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类似说明 - AM70PDL129BDH66IT |
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