数据搜索系统,热门电子元器件搜索 |
|
CS8405A-CS 数据表(PDF) 11 Page - Cirrus Logic |
|
CS8405A-CS 数据表(HTML) 11 Page - Cirrus Logic |
11 / 37 page CS8405A DS469F2 11 3. GENERAL DESCRIPTION The CS8405A is a monolithic CMOS device which encodes and transmits audio data according to the AES3, IEC60958, S/PDIF, and EIAJ CP1201 inter- face standards. The CS8405A accepts audio, channel status and user data, which is then multi- plexed, encoded, and driven onto a cable. The audio data is input through a configurable, 3-wire input port. The channel status bits and user bit data are input through an SPI or I²C Mode mi- crocontroller port and may be assembled in sepa- rate block sized buffers. For systems with no microcontroller, a stand alone mode allows direct access to channel status and user data input pins. Target applications include CD-R, DAT, DVD, MD and VTR equipment, mixing consoles, digital audio transmission equipment, high quality A/D convert- ers, effects processors, set-top TV boxes, and computer audio systems. Figure 5 shows the supply and external connec- tions to the CS8405A when configured for opera- tion with a microcontroller. 3.1 AES3 and S/PDIF Standards Documents This data sheet assumes that the user is familiar with the AES3 and S/PDIF data formats. It is advis- able to have current copies of the AES3 and IEC60958 specifications on hand for easy refer- ence. The latest AES3 standard is available from the Au- dio Engineering Society or ANSI at www.aes.org or www.ansi.org. Obtain the latest IEC60958 stan- dard from ANSI or from the International Electro- technical Commission at www.iec.ch. The latest EIAJ CP-1201 standard is available from the Jap- anese Electronics Bureau. Crystal Application Note 22: Overview of Digital Audio Interface Data Structures contains a useful tutorial on digital audio specifications, but it should not be considered a substitute for the standards. The paper An Understanding and Implementation of the SCMS Serial Copy Management System for Digital Audio Transmission, by Clifton Sanchez, is an excellent tutorial on SCMS. It is available from the AES as preprint 3518. 4.THREE-WIRE SERIAL INPUT AUDIO PORT A 3-wire serial audio input port is provided. The in- terface format can be adjusted to suit the attached device through the control registers. The following parameters are adjustable: • Master or slave • Serial clock frequency • Audio data resolution • Left or right justification of the data relative to left/right clock • Optional one-bit cell delay of the first data bit • Polarity of the bit clock • Polarity of the left/right clock. (By setting the appropriate control bits, many formats are pos- sible). Figure 6 shows a selection of common input for- mats with the corresponding control bit settings. In master mode, the left/right clock and the serial bit clock are outputs, derived from the OMCK input pin master clock. In slave mode, the left/right clock and the serial bit clock are inputs. The left/right clock must be syn- chronous to the OMCK master clock, but the serial bit clock can be asynchronous and discontinuous if required. The left/right clock should be continuous, but the duty cycle can be less than the specified typical value of 50% if enough serial clocks are present in each phase to clock all the data bits. |
类似零件编号 - CS8405A-CS |
|
类似说明 - CS8405A-CS |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |