2

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FSB50550T Rev. A

Pin Descriptions

Note:

Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM. External connections should be made as indicated in Figure

2 and 5.

Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)

Pin Number

Pin Name

Pin Description

1

COM

IC Common Supply Ground

Bias Voltage for U Phase High Side FRFET Driving

Bias Voltage for U Phase IC and Low Side FRFET Driving

Signal Input for U Phase High-side

Signal Input for U Phase Low-side

6

NC

No Connection

Bias Voltage for V Phase High Side FRFET Driving

Bias Voltage for V Phase IC and Low Side FRFET Driving

Signal Input for V Phase High-side

10

Signal Input for V Phase Low-side

11

NC

No Connection

12

Bias Voltage for W Phase High Side FRFET Driving

13

Bias Voltage for W Phase IC and Low Side FRFET Driving

14

Signal Input for W Phase High-side

15

Signal Input for W Phase Low-side

16

NC

No Connection

17

P

Positive DC–Link Input

18

Output for U Phase & Bias Voltage Ground for High Side FRFET Driving

19

Negative DC–Link Input for U Phase

20

Negative DC–Link Input for V Phase

21

Output for V Phase & Bias Voltage Ground for High Side FRFET Driving

22

Negative DC–Link Input for W Phase

23

Output for W Phase & Bias Voltage Ground for High Side FRFET Driving

COM

VCC

LIN

HIN

VB

HO

VS

LO

COM

VCC

LIN

HIN

VB

HO

VS

LO

COM

VCC

LIN

HIN

VB

HO

VS

LO

(1) COM

(2) V

B(U)

(3) V

CC(U)

(4) IN

(UH)

(5) IN

(UL)

(6) NC

(7) V

B(V)

(8) V

CC(V)

(9) IN

(VH)

(10) IN

(VL)

(11) NC

(12) V

B(W)

(13) V

CC(W)

(14) IN

(WH)

(15) IN

(WL)

(16) NC

(17) P

(18) U, V

S(U)

(19) N

U

(20) N

V

(21) V, V

S(V)

(22) N

W

(23) W, V

S(W)