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MC10107 数据表(PDF) 1 Page - ON Semiconductor

部件名 MC10107
功能描述  Triple 2-Input Exclusive OR/ Exclusive NOR Gate
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制造商  ONSEMI [ON Semiconductor]
网页  http://www.onsemi.com
标志 ONSEMI - ON Semiconductor

MC10107 数据表(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10107/D
MC10107
Triple 2-Input Exclusive OR/
Exclusive NOR Gate
The MC10107 is a triple–2 input exclusive OR/NOR gate.
P
D = 40 mW typ/gate (No Load)
t
pd = 2.8 ns typ
t
r, tf = 2.5 ns typ (20%–80%)
DIP
PIN ASSIGNMENT
VCC1
AOUT
AOUT
AIN
AIN
*NC
BIN
VEE
VCC2
CIN
CIN
COUT
COUT
BOUT
BOUT
BIN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
*NC = No Connection
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
15
13
14
9
4
12
10
11
3
2
7
5
3 = (4 • 5) + (4 • 5)
2 = (4 • 5) + (4 • 5)
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10107L
CDIP–16
25 Units / Rail
MC10107P
PDIP–16
25 Units / Rail
MC10107FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10107L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10107
AWLYYWW
1
1
16
MC10107P
AWLYYWW


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