MC100LVEL92

http://onsemi.com

2

D2

D1

Figure 1. Logic Diagram and Pinout: SO−20 WB (Top View)

D1

17

18

16

15

14

13

12

4

3

5

678

9

Q0

11

10

Q1 Q1

D0

19

20

2

1

D0

D2

GND

PECL

LVPECL

PECL

LVPECL

PECL

LVPECL

Table 1. PIN DESCRIPTION

FUNCTION

PECL Inputs

LVPECL Outputs

PECL Reference Voltage Output

LVPECL Power Supply

PECL Power Supply

Common Ground Rail

PIN

Dn, Dn

Qn, Qn

GND

to Power Supply to guarantee proper operation.

Table 2. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

PECL Power Supply

GND = 0 V

8 to 0

V

LVPECL Power Supply

GND = 0 V

8 to 0

V

PECL Input Voltage

GND = 0 V

6 to 0

V

Output Current

Continuous

Surge

50

100

mA

mA

± 0.5

mA

Operating Temperature Range

−40 to +85

°C

Storage Temperature Range

−65 to +150

°C

Thermal Resistance (Junction−to−Ambient) 0 lfpm

500 lfpm

SOIC−20 WB

SOIC−20 WB

90

60

°C/W

°C/W

Thermal Resistance (Junction−to−Case)

Standard Board

SOIC−20 WB

30 to 35

°C/W

Wave Solder

Pb

Pb−Free

<2 to 3 sec @ 248°C

<2 to 3 sec @ 260°C

265

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may

affect device reliability.