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MC74VHCT259AM 数据表(PDF) 1 Page - ON Semiconductor |
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MC74VHCT259AM 数据表(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev. 4 1 Publication Order Number: MC74VHCT259A/D MC74VHCT259A 8−Bit Addressable Latch/1−of−8 Decoder CMOS Logic Level Shifter with LSTTL−Compatible Inputs The MC74VHCT259 is an 8−bit Addressable Latch fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The VHC259 is designed for general purpose storage applications in digital systems. The device has four modes of operation as shown in the mode selection table. In the addressable latch mode, the signal on Data In is written into the addressed latch. The addressed latch follows the data input with all non−addressed latches remaining in their previous states. In the memory mode, all latches remain in their previous state and are unaffected by the Data or Address inputs. In the one−of−eight decoding or demultiplexing mode, the addressed output follows the state of Data In with all other outputs in the LOW state. In the Reset mode, all outputs are LOW and unaffected by the address and data inputs. When operating the VHCT259 as an addressable latch, changing more than one bit of the address could impose a transient wrong address. Therefore, this should only be done while in the memory mode. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V because it has full 5.0 V CMOS level output swings. The VHCT259A input structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. The output structures also provide protection when VCC = 0 V. These input and output structures help prevent device destruction caused by supply voltage−input/output voltage mismatch, battery backup, hot insertion, etc. Features • High Speed: tPD = 7.6 ns (Typ) at VCC = 5.0 V • Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C • TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V • Power Down Protection Provided on Inputs and Outputs • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300 mA • ESD Performance: HBM > 2000 V • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MARKING DIAGRAMS TSSOP−16 DT SUFFIX CASE 948F SOIC−16 D SUFFIX CASE 751B See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ORDERING INFORMATION http://onsemi.com A = Assembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or G = Pb−Free Package VHCT259AG AWLYWW VHCT 259A ALYW G G (Note: Microdot may be in either location) 1 1 16 1 1 16 1 SOEIAJ−16 M SUFFIX CASE 966 74VHCT259 ALYWG 1 16 |
类似零件编号 - MC74VHCT259AM |
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类似说明 - MC74VHCT259AM |
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