MC10EL51DTG datasheet(2/9 Pages) ONSEMI

部件名	MC10EL51DTG

功能描述	5V ECL Differential Clock D Flip-Flop

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制造商	ONSEMI [ON Semiconductor]

网页	http://www.onsemi.com

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MC10EL51, MC100EL51

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2

1

2

3

45

6

7

8

Q

VEE

VCC

Figure 1. Logic Diagram and Pinout Assignment

D

Q

CLK

R

D

R

Table 1. TRUTH TABLE

D*

L

H

X

R*

L

H

CLK*

Z

X

Q**

L

H

L

Z = LOW to HIGH Transition

R

ECL Reset Input

D

ECL Data Input

CLK, CLK

ECL Clock Inputs

Q, Q

ECL Data Outputs

VCC

Positive Supply

VEE

Negative Supply

Table 2. PIN DESCRIPTION

* Pin will default low when left open.

**Pin will default low when inputs are left open.

FUNCTION

EP

Exposed pad must be connected

to a sufficient thermal conduit.

Electrically connect to the most

negative supply or leave floating

open.

Table 3. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

VCC

PECL Mode Power Supply

VEE = 0 V

8

V

VEE

NECL Mode Power Supply

VCC = 0 V

−8

V

VI

PECL Mode Input Voltage

NECL Mode Input Voltage

VEE = 0 V

VCC = 0 V

VI VCC

VI VEE

6

−6

V

Iout

Output Current

Continuous

Surge

50

100

mA

TA

Operating Temperature Range

−40 to +85

°C

Tstg

Storage Temperature Range

−65 to +150

°C

qJA

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

8 SOIC

190

130

°C/W

qJC

Thermal Resistance (Junction−to−Case)

Standard Board

8 SOIC

41 to 44

°C/W

qJA

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

8 TSSOP

185

140

°C/W

qJC

Thermal Resistance (Junction−to−Case)

Standard Board

8 TSSOP

41 to 44 ± 5%

°C/W

qJA

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

DFN8

129

84

°C/W

Tsol

Wave Solder

Pb

Pb−Free

<2 to 3 sec @ 248°C

<2 to 3 sec @ 260°C

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

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