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CS51033 数据表(PDF) 6 Page - ON Semiconductor |
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CS51033 数据表(HTML) 6 Page - ON Semiconductor |
6 / 10 page CS51033 http://onsemi.com 6 Buck Regulator Operation A block diagram of a typical buck regulator is shown in Figure 4. If we assume that the output transistor is initially off, and the system is in discontinuous operation, the inductor current IL is zero and the output voltage is at its nominal value. The current drawn by the load is supplied by the output capacitor CO. When the voltage across CO drops below the threshold established by the feedback resistors R1 and R2 and the reference voltage VREF, the power transistor Q1 switches on and current flows through the inductor to the output. The inductor current rises at a rate determined by (VIN − VOUT)/Load. The duty cycle (or “on” time) for the CS51033 is limited to 80%. If output voltage remains higher than nominal during the entire COSC change time, the Q1 does not turn on, skipping the pulse. Figure 4. Buck Regulator Block Diagram R1 R2 CO RLOAD L D1 Feedback Control Q1 CIN VIN Charge Pump Circuit (Refer to the CS51033 Application Diagram on page 2). An external charge pump circuit is necessary when the VC input voltage is below 5.0 V to ensure that there is suffifient gate drive voltage for the external FET. When VIN is applied, capacitors C1 and C2 will be charged to a diodes drop below VIN via diodes D2 and D4, respectively. When the P−Ch FET turns on, it’s drain voltage will be approximately equal to VIN. Since the voltage across C1 can not change instantaneously, D2 is reverse biased and the anode voltage rises to approximately 2.0 × 3.3 V − VD2. C1 transfers some of its stored charge C2 via D3. After several cycles there is sufficient gate drive voltage. |
类似零件编号 - CS51033_05 |
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类似说明 - CS51033_05 |
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