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SN74GTL16616 数据表(PDF) 1 Page - Texas Instruments |
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SN74GTL16616 数据表(HTML) 1 Page - Texas Instruments |
1 / 14 page www.ti.com FEATURES DGG OR DL PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 OEAB LEAB A1 GND A2 A3 VCC (3.3 V) A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC (3.3 V) A16 A17 GND CLKIN OEBA LEBA CEAB CLKAB B1 GND B2 B3 VCC (5 V) B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VREF B16 B17 GND CLKOUT CLKBA CEBA DESCRIPTION/ORDERING INFORMATION SN74GTL16616 17-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS SCBS481H – JUNE 1994 – REVISED APRIL 2005 • Member of the Texas Instruments Widebus™ Family • UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, or Clock-Enabled Modes • OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference • GTL Buffered CLKAB Signal (CLKOUT) • Translates Between GTL/GTL+ Signal Levels and LVTTL Logic Levels • Supports Mixed-Mode (3.3 V and 5 V) Signal Operation on A-Port and Control Inputs • Equivalent to '16601 Function • Ioff Supports Partial-Power-Down Mode Operation • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors on A Port • Distributed VCC and GND Pins Minimize High-Speed Switching Noise • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) The SN74GTL16616 is a 17-bit UBT™ transceiver that provides LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. Combined D-type flip-flops and D-type latches allow for transparent, latched, clocked, and clocked-enabled modes of data transfer identical to the '16601 function. Additionally, this device provides for a copy of CLKAB at GTL/GTL+ signal levels (CLKOUT) and conversion of a GTL/GTL+ clock to LVTTL logic levels (CLKIN). This device provides an interface between cards operating at LVTTL logic levels and a backplane operating at GTL/GTL+ signal levels. Higher-speed operation is a direct result of the reduced output swing (<1 V), reduced input threshold levels, and OEC™ circuitry. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube SN74GTL16616DL GTL16616 SSOP – DL –40°C to 85°C Tape and reel SN74GTL16616DLR GTL16616 TSSOP – DGG Tape and reel SN74GTL16616DGGR GTL16616 (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, UBT, OEC are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright © 1994–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
类似零件编号 - SN74GTL16616 |
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类似说明 - SN74GTL16616 |
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