数据搜索系统,热门电子元器件搜索 |
|
STP16CP05 数据表(PDF) 10 Page - STMicroelectronics |
|
STP16CP05 数据表(HTML) 10 Page - STMicroelectronics |
10 / 26 page Timing diagrams STP16CP05 10/26 5 Timing diagrams Note: OUT0 to OUT15 = ON when Dn = H; OUT0 to OUT15 = OFF when Dn = L. Figure 7. Timing diagram Note: The latches circuit holds data when the LE terminal is Low. 1 When LE terminal is at High level, latch circuit hold the data it passes from the input to the output. 2 When OE terminal is at Low level, output terminals OUT0 to OUT15 respond to the data, either ON or OFF. 3 When OE terminal is at High level, it switches off all the data on the output terminal. Table 8. Truth Table CLOCK LE /OE SERIAL- IN OUT0 ............. OUT7 ................ OUT15 SDO H L Dn Dn ..... Dn - 7 ..... Dn -15 Dn - 15 L L Dn + 1 No Change Dn - 14 H L Dn + 2 Dn - 2 ..... Dn - 5 ..... Dn -13 Dn - 13 X L Dn + 3 Dn - 2 ..... Dn - 5 ..... Dn -13 Dn - 13 X L Dn + 3 ON Dn - 13 |
类似零件编号 - STP16CP05 |
|
类似说明 - STP16CP05 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |