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HCF4026BEY 数据表(PDF) 1 Page - STMicroelectronics |
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HCF4026BEY 数据表(HTML) 1 Page - STMicroelectronics |
1 / 11 page 1/11 September 2001 s COUNTER AND 7-SEGMENT DECODING IN ONE PACKAGE s EASILY INTERFACED WITH 7-SEGMENT DISPLAY TYPES s FULLY STATIC COUNTER OPERATION : DC TO 6MHz (Typ.) AT VDD = 10V s IDEAL FOR LOW POWER DISPLAYS s DISPLAY ENABLE OUTPUT s QUIESCENT CURRENT SPECIF. UP TO 20V s STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS s INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C s 100% TESTED FOR QUIESCENT CURRENT s MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES" DESCRIPTION The HCF4026B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4026B consists of a 5-stages Johnson decade counter and an output decoder which converts the Johnson code to a 7 segment decoded output for driving one stage in a numerical display. This device is particularly advantageous in display applications where low power dissipation and/or low package count are important. This device has CLOCK, RESET, CLOCK INHIBIT, DISPLAY ENABLE input and CARRY OUT, DISPLAY ENABLE, UNGATED "C" SEGMENT and 7 DECODED outputs (a to g). A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (COUT) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding decade directly in a multi-decade counting chain. HCF4026B DECADE COUNTER/DIVIDER WITH DECODED 7-SEGMENT DISPLAY OUTPUT AND DISPLAY ENABLE PIN CONNECTION ORDER CODES PACKAGE TUBE T & R DIP HCF4026BEY SOP HCF4026BM1 HCF4026M013TR DIP SOP |
类似零件编号 - HCF4026BEY |
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类似说明 - HCF4026BEY |
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